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| author | Thierry Reding <treding@nvidia.com> | 2026-09-01 21:55:27 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2026-09-11 12:29:39 +0200 |
| commit | 499bad4bc979f5b4b7fd20b88da4d20acd684f60 (patch) | |
| tree | a9356325a027bb550a393f134afa6cd439de279f /tools/perf/scripts/python/bin/stackcollapse-report | |
| parent | 5fa7fe92018dc8fb41b2bd0f9dbbc6e704e795d3 (diff) | |
arm64: tegra: Clean up AHUB on Tegra194
Use #address-cells = <1> and #size-cells = <1> because we don't need
64-bit register addressing for this hardware. While at it, also adjust
the ranges property to encompass the entire AHUB range as per the TRM.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
0 files changed, 0 insertions, 0 deletions