diff options
| author | Mark Brown <broonie@kernel.org> | 2026-09-08 19:54:52 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-09-08 19:54:52 +0100 |
| commit | 8fa5ce4e95bda6d3a90761d07d171f9e3f2f9328 (patch) | |
| tree | 0236ef3ca7399fbb0ad403590e6a6346d9d2f117 /tools/perf/scripts/python/bin | |
| parent | 5bb30783e4e5782349b5bfafbaf982bf86285302 (diff) | |
| parent | 322a9e0850b41a628b59c29be89f499acba9f1c8 (diff) | |
ASoC: codecs: lpass-macros: switch regcache to REGCACHE_MAPLE
Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> says:
Move all four LPASS codec macros (rx/tx/va/wsa) from REGCACHE_FLAT to
REGCACHE_MAPLE, and fix a latent v2.5 Compander1 addressing bug that
the flat cache had been absorbing.
REGCACHE_FLAT hides missing-default reads by returning the zero-
initialised cache slot instead of doing a bus read. The caller can't
tell that value apart from a real hardware value, so any un-defaulted,
readable, non-volatile register that gets read silently returns wrong
data. Since commit e062bdfdd6ad ("regmap: warn users about
uninitialized flat cache") regmap dev_warn_once()s the first such
miss, but any subsequent miss stays silent.
REGCACHE_MAPLE reports a cache miss as -ENOENT and the regmap core
falls back to a real bus read, so the caller always gets the true
hardware value. All four macros are switched in the same series
for consistency.
The switch surfaced a latent bug in wsa_macro_set_spkr_mode() on
v2.5+ silicon: two Compander1 register addresses moved on that
generation and the driver was writing to the v2.1 addresses on all
versions, taking a silent bus error. Patch 1/6 fixes that and is
tagged Cc: stable.
Series contents:
1/6: wsa-macro: use v2.5 Compander1 addresses on v2.5+ silicon
(fix, tagged for stable).
2/6: rx-macro + wsa-macro: sort concatenated reg_defaults before
regmap init so regmap does not sort a copy at runtime.
3/6: wsa-macro: switch cache to REGCACHE_MAPLE.
4/6, 5/6, 6/6: rx-macro / tx-macro / va-macro: cache switch,
same rationale as 3/6.
Tested on Glymur (SC8480XP CRD, WCD9378 SDCA compute mode + WSA8845
speakers): HPH playback, mic capture and WSA speaker playback all
work with the full series applied; the "using zero-initialized flat
cache" and "Unsorted reg_defaults" warnings both disappear from the
boot log.
Link: https://patch.msgid.link/20260908082806.648797-1-srinivas.kandagatla@oss.qualcomm.com
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions
