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| author | Sascha Bischoff <Sascha.Bischoff@arm.com> | 2026-09-04 11:51:03 +0000 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2026-09-14 10:49:09 +0100 |
| commit | 9264a0c0bf0e1fa4e2be2c146aef6c3bedceb72d (patch) | |
| tree | 9a02d174a94ba22ffe8de722ac86d183adb72703 /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | 71091136d1452b6125579b210d29efec3e79681a (diff) | |
KVM: arm64: gic-v5: Add CoreSight MMIO regs to IRS
Expose the CoreSight identification registers in the emulated GICv5
IRS MMIO region. These registers are read-only from the guest's point
of view, so return the architectural identification values and ignore
writes.
Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
Link: https://patch.msgid.link/20260904113404.4051341-34-sascha.bischoff@arm.com
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions