diff options
| author | Biju Das <biju.das.jz@bp.renesas.com> | 2026-08-25 10:50:43 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-09-21 10:51:46 +0200 |
| commit | 137e18198c04852532ef2c056d9a572fc3b54cd3 (patch) | |
| tree | 9712dd9a34ff3cf42640a21256732d32b2f9e311 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | b43aa6a6ebe8ca8bdd75ee688e1eb2d0d16a888e (diff) | |
arm64: dts: renesas: r9a08g046: Add PCIe support
Populate the previously placeholder PCIe node for the RZ/G3L (R9A08G046)
SoC with interrupts, clocks, resets, interrupt-map, and the PCIe root
port's vendor/device ID, and enable it on the RZ/G3L SMARC board with
the required pin control, CLKREQ# GPIO hog, and 100 MHz reference clock.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260825095047.9971-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions