PCI/P2PDMA: Add Intel Haswell client host bridge to allowlist

P2P DMA between two devices that do not share an upstream bridge is only
permitted when the traffic goes through a host bridge that is listed in
pci_p2pdma_whitelist[] with REQ_SAME_HOST_BRIDGE.

The Haswell client host bridge (8086:0c08, e.g. H97/H87/B85) is not in that
list, and cpu_supports_p2pdma() returns false on Intel, so
calc_map_type_and_dist() refuses P2P for any pair of devices behind
different root ports of the same host bridge, even though that root complex
handles the traffic correctly.

Measured on an ASUS H97-PRO with a Xeon E3-1231 v3 (Haswell, 8086:0c08 at
00:00.0) and two GPUs on separate root ports of that host bridge (00:01.0
and 00:1c.4):

  - pci_p2pdma_distance() < 0 before the change; peer access granted after
    (amdgpu stops reporting "PCIe P2P access ... is not supported by the
    chipset" and hipDeviceCanAccessPeer() returns true in both directions)

  - 10 KB cross-device copy: 62-75 us vs 130-131 us host-staged (~2x)

  - 512 MB cross-device copy verified byte-wise against a known buffer:
    no corruption

  - tensor-parallel LLM inference (>25 GB model across both GPUs):
    +53% tokens/s

REQ_SAME_HOST_BRIDGE is the correct flag here: the two devices share the
upstream bridge (two root ports of one host bridge) rather than sitting
behind a PCIe switch.

This entry only permits P2P DMA to be used on this platform, it does not
force it: the existing checks on ACS redirect, on the map type and on
pci_p2pdma_distance() all still apply. Tested on one board only, so the
usual caveat applies - broad testing on other Haswell boards would be
needed before this can be considered generally safe.

Signed-off-by: Scott Lee <dsix123@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patch.msgid.link/20261005132651.18368-1-dsix123@gmail.com

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