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authorSascha Bischoff <Sascha.Bischoff@arm.com>2026-09-04 11:42:24 +0000
committerMarc Zyngier <maz@kernel.org>2026-09-14 10:49:08 +0100
commit2111261ac1c8cdd6d271c8a10860943720504241 (patch)
tree0f92c85aea144d263d5a54ab7b19f18190ca2da7 /tools/perf/scripts/python/flamegraph.py
parentdc5e201aba78c8977336f71b9eb4eae9f72654ba (diff)
KVM: arm64: gic-v5: Request doorbells when VPEs enter WFI
When a GICv5 VPE is made non-resident as part of the vcpu entering WFI, request a VPE doorbell so that KVM can be notified when a suitable SPI or LPI becomes pending for that VPE. Program the doorbell priority mask, DBPM, from the effective virtual priority mask before making the VPE non-resident. DBPM is the priority threshold used by the GICv5 hardware to decide whether a pending SPI or LPI is allowed to signal the VPE doorbell. This allows hardware to signal the doorbell only for interrupts that the vcpu can actually take, and avoids waking it for interrupts masked by the guest priority state. If no interrupt can be signalled to the vcpu, leave the doorbell request clear. Attempt to make the doorbell interrupt affine to the current CPU before requesting it. Treat affinity failures as non-fatal and continue using the existing placement. A successful move nudges the wakeup back towards the CPU that last ran the vcpu, where the relevant state is more likely to be cache-hot, while also spreading doorbell interrupts across host PEs as different vcpus enter WFI on different CPUs. Clear stale db_fired state before making the VPE non-resident. Any previous doorbell notification has already been consumed by this point, and clearing it before the non-resident transition ensures that a newly fired doorbell is observed. Finally, teach kvm_vgic_vcpu_pending_irq() to report pending work for a GICv5 vcpu when its VPE doorbell has fired, in addition to the existing pending-PPI check. Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com> Link: https://patch.msgid.link/20260904113404.4051341-17-sascha.bischoff@arm.com Signed-off-by: Marc Zyngier <maz@kernel.org>
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