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authorChuan Liu <chuan.liu@amlogic.com>2026-09-20 18:25:04 +0800
committerNeil Armstrong <neil.armstrong@linaro.org>2026-10-02 11:24:25 +0200
commit668232197683898b1dbab05d6f1e7f93084160c1 (patch)
treef93d1bec901b97aee1bc38c58a85a7f25b5012b6 /tools/perf/scripts/python/flamegraph.py
parentb6dd5a5465bb1c24279c1b18d9ee738c996f9ec6 (diff)
dt-bindings: soc: amlogic: Add clk-measure compatible to support more SoCs
Add clk-measure compatible for amlogic A5, A4, S7, S7D, S6 and A9 SoCs. Although the clk-measure IP itself has little hardware difference across SoCs, the clock inputs connected to the clk-measure block vary between SoCs. Therefore, it is difficult to fall back to the configuration used by previous SoCs. Signed-off-by: Chuan Liu <chuan.liu@amlogic.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260920-more-socs-to-support-clk_measure-v2-2-224382a429e8@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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