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authorSascha Bischoff <Sascha.Bischoff@arm.com>2026-09-04 11:37:50 +0000
committerMarc Zyngier <maz@kernel.org>2026-09-14 10:49:07 +0100
commit896b6a10253c104eeb6a2bd98be297a7b51f6600 (patch)
tree262d8253b80a29d1b0efc6078ef51602d6dd0c6d /tools/perf/scripts/python/flamegraph.py
parentbe0b3fd6345369e1fca0b52df52815a589629cb2 (diff)
KVM: arm64: gic-v5: Cache host IRS ID registers
KVM needs access to the host IRS configuration frame to configure virtual-machine resources. The frame ID registers describe the capabilities available to KVM. Cache IRS_IDR2, IRS_IDR3, and IRS_IDR4 rather than extracting their individual fields into kvm_vgic_global_state. Accessor helpers derive the required capabilities from the cached registers. Use the cached IRS_IDR4 VPE capacity to limit the maximum number of vCPUs, while retaining VGIC_V5_MAX_CPUS as KVM's own upper bound. Keeping the raw register values lets KVM adjust the exposed capabilities when needed, as is done for ICH_VTR_EL2, and avoids tying future EL2 code to the layout of kvm_vgic_global_state. Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com> Link: https://patch.msgid.link/20260904113404.4051341-8-sascha.bischoff@arm.com Signed-off-by: Marc Zyngier <maz@kernel.org>
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