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authorAurelien Jarno <aurelien@aurel32.net>2026-09-28 22:49:06 +0200
committerYixun Lan <dlan@kernel.org>2026-10-02 10:58:06 +0000
commita87ca1e5b5d28dee5af42f59f3c6f833c5ad1da0 (patch)
treecad5158330c12aba75601301da83f2ab439aad0b /tools/perf/scripts/python/flamegraph.py
parent789eed2d8bfa83d79e24d185f736b038a121b3ce (diff)
riscv: dts: spacemit: k3: move USB3 phy to board level
On the SpacemiT K3 SoC, the combo phy provides 8 lines that can either be used for PCIe or USB3, depending on its configuration (spacemit,apmu). This configuration is defined at the board level, and assigning a phy line to a USB3 controller while it is configured as PCIe results in an "Invalid PHY mode" error. Move the USB phy definitions at the board level, as it is done for the submitted PCIe controller [1]. As a consequence, boards that do not enable a USB3 controller node will not match the DT schema due to missing PHY entries. This is not an issue as dtbs_check only validates enabled nodes. [1] https://lore.kernel.org/spacemit/20260923015016.64069-1-inochiama@gmail.com Fixes: 46380e4b1534 ("riscv: dts: spacemit: k3: add USB controller and USB phy support") Cc: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Yixun Lan <dlan@kernel.org> Link: https://patch.msgid.link/20260928205012.3689405-2-aurelien@aurel32.net Signed-off-by: Yixun Lan <dlan@kernel.org>
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