perf/x86/intel: Check only PMC bits in PEBS_ENABLED when detecting host PEBS usage

When checking to see if guest PEBS usage should be disabled due to host
PEBS usage, filter out non-counter bits in PEBS_ENABLE to avoid getting
false positives in the unlikely scenario that "Enable Precise Store" is
enabled without PEBS actually being active for any PMCs.

Note, the other "hidden" usage of pebs_mask is already explicitly masked
with intel_ctrl:

  .guest = intel_ctrl & ~cpuc->intel_ctrl_exclude_guest_mask & ~pebs_mask,

I.e. removing the non-counter bits from pebs_mask doesn't change the value
that is loaded into arr[global_ctrl].guest.

Fixes: 854250329c02 ("KVM: x86/pmu: Disable guest PEBS temporarily in two rare situations")
Closes: https://lore.kernel.org/all/20260508234018.F06AEC2BCB0@smtp.kernel.org
Reported-by: Sashiko Bot <sashiko-bot@kernel.org>
Suggested-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Link: https://patch.msgid.link/20260921191418.950933-11-seanjc@google.com

0 files changed, 0 insertions, 0 deletions