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| author | Dapeng Mi <dapeng1.mi@linux.intel.com> | 2026-08-24 16:27:29 +0800 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2026-09-02 13:10:46 +0200 |
| commit | 00cf8daabe2bfd45e7283e44ad7cb3977089259b (patch) | |
| tree | 083efd7c73a7ecf168b81144af534a53a9898bac /tools/perf/scripts/python/stackcollapse.py | |
| parent | c4fabb67a47f8103b80fadfcab3ba17e75784ab5 (diff) | |
perf/x86/intel: Advertise PERF_PMU_CAP_SIMD_REGS capability
Set PERF_PMU_CAP_SIMD_REGS once XSAVES-backed extended state beyond XMM
is available for sampling, e.g. YMM, ZMM, OPMASK, eGPRs, or SSP.
Keep backward compatibility unchanged. When only XMM sampling is
available, continue to expose only PERF_PMU_CAP_EXTENDED_REGS. Expose
PERF_PMU_CAP_SIMD_REGS only when additional SIMD/predicate register state
is supported.
Co-developed-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://patch.msgid.link/20260824082731.1013973-22-dapeng1.mi@linux.intel.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions