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authorLucas Tanure <tanure@linux.com>2026-09-05 16:32:33 +0100
committerNeil Armstrong <neil.armstrong@linaro.org>2026-09-16 11:50:27 +0200
commit065957517880dc7053e0723cc9532b6e78c8855c (patch)
treee95ed36a77ea0e754d64d87d3e8236246666275a /tools/perf/scripts/python/stackcollapse.py
parent6b59171d0fe541438da68c19541cd2f31c60ac04 (diff)
arm64: dts: amlogic: t7: add the pipeline clock to the MMC controllers
The SD/eMMC controllers reach the DRAM through a pipeline stage that the hardware design inserts in the bus path to the NIC_MATRIX fabric, clocked by CLKID_SYS_AMPIPE_NAND. When that clock is disabled, a controller that starts a DMA transfer can never complete it. Reference the clock from the three MMC controller nodes so the driver keeps it running, instead of relying on the clock being marked critical in the clock controller. Assisted-by: Claude:claude-fable-5 Signed-off-by: Lucas Tanure <tanure@linux.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260905153234.133217-4-tanure@linux.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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