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| author | Dapeng Mi <dapeng1.mi@linux.intel.com> | 2026-08-24 16:27:27 +0800 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2026-09-02 13:10:46 +0200 |
| commit | 098cdd582a9baa7e4bcb26e80a22ebfddc74293a (patch) | |
| tree | 843197d8a9b14fb7d72d00cfcf20aea9e3cddb4e /tools/perf/scripts/python/stackcollapse.py | |
| parent | 578460d9af8d5816eff59642a8bb11945026b8d1 (diff) | |
perf/x86: Support SSP sampling using sample_regs_* fields
Support sampling of CET SSP register via the sample_regs_* fields.
To sample SSP, the sample_simd_regs_enabled field must be set. This
allows the spare space (reclaimed from the original XMM space) in the
sample_regs_* fields to be used for representing SSP.
Similar to eGPRs sampling, the perf_reg_value() function needs to
check if the PERF_SAMPLE_REGS_ABI_SIMD flag is set first, and then
determine whether to output SSP or legacy XMM registers to userspace.
Additionally, arch-PEBS supports sampling SSP, which is placed into the
GPRs group. Also enables arch-PEBS-based SSP sampling.
Currently, SSP sampling is only supported on the x86_64 architecture, as
CET is only available on x86_64 platforms.
SSP sampling will be enabled in a subsequent patch that sets
PERF_PMU_CAP_SIMD_REGS.
Co-developed-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://patch.msgid.link/20260824082731.1013973-20-dapeng1.mi@linux.intel.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions