diff options
| author | Kuldeep Singh <kuldeep.singh@oss.qualcomm.com> | 2026-07-14 15:35:17 +0530 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-08-31 14:02:23 -0500 |
| commit | 099cd05d200ba241bcc7497c4384b8d657a5632e (patch) | |
| tree | 8d65046dc52fe0e9d587995884776c9b90a1cdf0 /tools/perf/scripts/python/stackcollapse.py | |
| parent | db4ac552889f6a952de872ea6128e1caca07fffb (diff) | |
arm64: dts: qcom: shikra: Add ICE, TRNG and QCE nodes
Add device tree nodes describing the crypto hardware blocks present
on the Qualcomm Shikra platform:
- BAM DMA controller used by the Qualcomm crypto engine
- QCE (crypto) engine with DMA support
- TRNG hardware random number generator
- Inline crypto engine (ICE)
Also connect the SDHC controller to ICE via "qcom,ice" property to
support inline encryption.
On Shikra, different BAM pipe pairs (for example 0x84/0x94 and
0x86/0x96) may still resolve to the same resulting SID due SMMU-side
optimization. They are still distinct pipe pairs and therefore require
separate DT IOMMU entries.
Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260714-b4-shikra_crypto_changse-v4-6-06a4ea97c209@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
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