diff options
| author | Greg Ociepka <greg@ferrisoft.com> | 2026-08-12 10:35:22 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-08-31 11:12:33 -0500 |
| commit | 0f8d35f04a126fb17134728ec441a177a35babb5 (patch) | |
| tree | e7071b0cf7b5337638a3d322e3098c833edba288 /tools/perf/scripts/python/stackcollapse.py | |
| parent | fd452641dfebc13da4a44ef5a0417e4480b0e0a3 (diff) | |
arm64: dts: qcom: glymur: Add missing USB clock, power and bandwidth votes
The four USB3 controller nodes on Glymur (usb_0, usb_1, usb_2, usb_mp)
are missing three property groups that Glymur's own usb_hs node at
a200000 already carries, and that Hamoa (x1e80100) carries on all five
of its USB controllers:
- assigned-clocks / assigned-clock-rates
- required-opps
- interconnects / interconnect-names
Without required-opps the controllers place no performance state vote
on their power domain. Measured on an Asus Zenbook A16 (UX3607OA) with
a SuperSpeed device enumerated, CX aggregates to SVS while the
controllers run their master clock at 200 MHz:
$ grep -E "^cx " /sys/kernel/debug/pm_genpd/pm_genpd_summary
cx on 128
$ grep "usb30.*master_clk " /sys/kernel/debug/clk/clk_summary
gcc_usb30_sec_master_clk ... 200000000
gcc_usb30_prim_master_clk ... 200000000
gcc_usb30_mp_master_clk ... 200000000
128 is RPMH_REGULATOR_LEVEL_SVS; rpmhpd_opp_nom is 256. With this
patch applied the same measurement reads 256 while a controller is
active.
Without interconnects, dwc3_qcom_interconnect_init() silently does
nothing: of_icc_get() returns NULL rather than an error pointer for a
device without the property, so probe succeeds and icc_set_bw() on a
NULL path is a no-op. No USB-DDR bandwidth is ever requested.
Without assigned-clock-rates nothing programs the master clock RCG,
which keeps whatever the bootloader left behind. On this machine that
happens to be the correct 200 MHz, but ftbl_gcc_usb30_mp_master_clk_src
also allows 66.67 and 133.33 MHz, neither of which sustains SuperSpeed.
Add all three groups to the four nodes, mirroring usb_hs. The
interconnect paths follow the provider layout in
drivers/interconnect/qcom/glymur.c: usb_0/usb_1 sit on aggre4_noc,
usb_mp on aggre3_noc and usb_2 on aggre2_noc.
Fixes: 4eee57dd4df9 ("arm64: dts: qcom: glymur: Add USB related nodes")
Assisted-by: Claude:fable-5
Signed-off-by: Greg Ociepka <greg@ferrisoft.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Tested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260812083522.774711-1-greg@ferrisoft.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions
