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| author | Thierry Reding <treding@nvidia.com> | 2026-09-01 21:52:03 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2026-09-11 12:29:38 +0200 |
| commit | 211b504ff27affd674e48f6e23ce1dd9142b4c8c (patch) | |
| tree | 42c94ea83a180feba354d7532737a99b8bf1c333 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 9263ab9369b26dd8b8f210e114084640bf9bf5b1 (diff) | |
arm64: tegra: Clean up AHUB on Tegra132
Use #address-cells = <1> and #size-cells = <1> because we don't need
64-bit register addressing for this hardware. While at it, also adjust
the ranges property to encompass the entire AHUB range as per the TRM.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions