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| author | Borislav Petkov (AMD) <bp@alien8.de> | 2026-08-20 17:02:10 -0700 |
|---|---|---|
| committer | Borislav Petkov (AMD) <bp@alien8.de> | 2026-09-14 19:10:24 -0700 |
| commit | 228200f695c0f92c5fd06ff0bdcf94bb0d2ca7f5 (patch) | |
| tree | dd9a6d8e382d1209be4b5cca648d376a87365d33 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 9025f3bf73f0565eaa271ecc15f468b1d1e4cbaa (diff) | |
x86/CPU/AMD: Fix Zen5 TLB sizes reporting
Starting with Zen5, TLB sizes in CPUID_Fn80000006_E[AB]X are reported
as multiples of 32. There's a CPUID bit which determines that:
CPUID_Fn80000021_EAX [Extended Feature 2 EAX] (Core::X86::Cpuid::FeatureExt2Eax)
...
14: L2TlbSizeX32. Read-only. Reset: 1. Indicates that L2TLB sizes are encoded as multiples of 32.
Update the places which report that information.
With it, the numbers look correct now:
-Last level iTLB entries: 4KB 64, 2MB 64, 4MB 32
-Last level dTLB entries: 4KB 128, 2MB 128, 4MB 64, 1GB 0
+Last level iTLB entries: 4KB 2048, 2MB 2048, 4MB 1024
+Last level dTLB entries: 4KB 4096, 2MB 4096, 4MB 2048, 1GB 0
/proc/cpuinfo
-TLB size : 192 4K pages
+TLB size : 6144 4K pages
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20260821022031.946311-1-bp@kernel.org
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions
