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| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2026-06-15 12:54:53 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-09-14 10:07:58 +0200 |
| commit | 58e45a8c713730de22e0c1e4d9744b424bf4124f (patch) | |
| tree | 685c8e6035557f9a0bb1de0cd8aa35331670aaf4 /tools/perf/scripts/python/stackcollapse.py | |
| parent | d49ff6f93605319f99b2416a61c0c40ae52dbd23 (diff) | |
arm64: dts: renesas: r9a09g087: Add VSPD and FCPVD nodes
Add VSPD and FCPVD nodes to RZ/N2H SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260615115455.1412098-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions