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| author | Qiang Yu <qiang.yu@oss.qualcomm.com> | 2026-08-25 19:59:21 -0700 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-08-31 11:10:06 -0500 |
| commit | 5d9046549e433257f7fcc5d59a9a449c8c11dd84 (patch) | |
| tree | 9bb1902a7e4dbbc1f5a4048121769fab23295703 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 7a147b572a22efb1404249f74d982ea386f59774 (diff) | |
arm64: dts: qcom: glymur-crd: Add PHY supplies for pcie3_phy
CRD wires the shared Gen5x8 PCIe PHY's regulator supplies through
board-specific PMIC rails. Add the vdda-phy, vdda-pll, and
vdda-refgen0p9/1p2 supplies for &pcie3_phy.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260825-glymur_linkmode_0826-v10-2-56ab597d77e4@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions