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authorSascha Bischoff <Sascha.Bischoff@arm.com>2026-09-04 11:50:02 +0000
committerMarc Zyngier <maz@kernel.org>2026-09-14 10:49:09 +0100
commit6479d16be163b2e3ce9cfdc6791e16aa42480f8a (patch)
treee2d7a87dc9380d3725b7cdaf47a07f5c36d0aa19 /tools/perf/scripts/python/stackcollapse.py
parent589d6072f25d0690ab9bace88b0d77a06e6ff22d (diff)
KVM: arm64: gic-v5: Add GICv5 EL1 sysreg userspace accessors
Now that KVM is able to run meaningful VMs with GICv5, it is important to be able to save and restore the GICv5 state in order to support VM migration. Add functions to handle userspace reads and writes of the GICv5 EL1 system registers. Some architected register values are reconstructed from KVM's internal representation rather than stored as raw register state. For example, ICC_CR0_EL1.En and ICC_PCR_EL1.Priority are backed by fields in the saved virtual VMCR, while the PPI Enable, Active, and Pending registers are assembled from per-interrupt vgic_irq state. Userspace writes are translated back into the corresponding internal representation. Wire the accessors into KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS for the GICv5 device, reusing the existing GICv3 CPU sysreg UAPI encoding. Require the VGIC to be initialised before accessing the register state. Allow userspace to read the state after a vCPU has run, but reject writes once any vCPU has run. This ensures that userspace restores the GICv5 CPU interface state before KVM finalises it for guest execution. Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com> Link: https://patch.msgid.link/20260904113404.4051341-32-sascha.bischoff@arm.com Signed-off-by: Marc Zyngier <maz@kernel.org>
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