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| author | Xianwei Zhao <xianwei.zhao@amlogic.com> | 2026-07-31 09:08:26 +0000 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-09-04 18:06:00 +0100 |
| commit | 754d2bbd92f5ecef0eb4f5b1ac7b1417320a56ca (patch) | |
| tree | 2a1a938133b973b5c0c01fa7055e344128090fb6 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 29359ee126bdb8222eb1b74c32dc63ab1f921584 (diff) | |
spi: amlogic: spisg: Fix transfer size limit and timeout handling
The CFG_BLOCK_NUM field can encode at most 20 bits, so reduce
SPISG_BLOCK_MAX to 0xfffff to avoid programming a zero-length transfer.
Perform the delay calculation in 64-bit arithmetic to avoid overflow
when converting nanoseconds to SPI clock cycles.
Stop the controller on transfer timeout by clearing the descriptor list
register before returning an error.
Fixes: cef9991e04ae ("spi: Add Amlogic SPISG driver")
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://patch.msgid.link/20260731-a9-spisg-v3-2-a15da3f70029@amlogic.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions