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| author | Clément Le Goffic <clement.legoffic@foss.st.com> | 2026-07-22 11:16:16 +0200 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2026-09-11 16:21:42 +0200 |
| commit | b1661b5df1e81568984a4cb73574f1ee13d90221 (patch) | |
| tree | 6c0d211cf52e12d446dc701f234f925eb375e498 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 4051a557c46e24110ea91be961949defbbe4abc0 (diff) | |
ARM: dts: stm32: add sram pool to spi5 for DMA-MDMA chaining on MP13 DK
The sram pool is used as a buffer area during a spi transfer using
DMA-MDMA chaining.
The pool size depends on the SPI framework that creates sg up to
4096 bytes.
Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/20260722-spi_arm_stm32_dt-v1-6-6ef611523232@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions