Merge branch kvm-arm64/gicv5-7.4 into kvmarm-master/next

* kvm-arm64/gicv5-7.4: (52 commits)
  : \
  : GICv5 IRS support, courtesy of Sascha Bischoff. From the cover letter:
  :
  : "This series builds on the initial vGICv5 support and adds support
  : for the GICv5 IRS, as described by the GICv5 (EAC0) specification.
  : With this, a GICv5 guest is no longer restricted to PPIs, and can make
  : use of SPIs and LPIs as well."
  : /
  KVM: arm64: vgic-v5: Correctly handle host ISTE __le32 conversion
  KVM: arm64: vgic-v5: Tidy-up programming of vpe descriptor address
  KVM: arm64: vgic-v5: Correctly reset h_lpi_ist to NULL
  KVM: arm64: vgic-v5: Drop __iomem attribute from {vmd,vpet}_base
  KVM: selftests: Add VGICv5 sparse vCPU IDs test
  KVM: selftests: Add VGICv5 IST save/restore coverage
  KVM: selftests: Add VGICv5 LPI delivery tests
  KVM: selftests: Add VGICv5 SPI injection tests
  KVM: selftests: Add VGICv5 CPU sysreg attribute tests
  KVM: selftests: Add VGICv5 USERSPACE_PPIS tests
  KVM: selftests: Add VGICv5 IST attribute tests
  KVM: selftests: Add VGICv5 IRS_REGS attribute tests
  KVM: selftests: Add VGICv5 NR_IRQS attribute tests
  KVM: selftests: Add VGICv5 IRS address attribute tests
  Documentation: KVM: Add the VGICv5 IRS save/restore sequences
  Documentation: KVM: Add docs for KVM_DEV_ARM_VGIC_GRP_IST
  Documentation: KVM: Add KVM_DEV_ARM_VGIC_GRP_IRS_REGS to VGICv5 docs
  Documentation: KVM: Document KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS for VGICv5
  KVM: arm64: gic-v5: Implement save/restore mechanisms for ISTs
  KVM: arm64: gic-v5: Add VGICv5 IST save/restore UAPI
  ...

Signed-off-by: Marc Zyngier <maz@kernel.org>

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