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| author | Markus Schneider-Pargmann (TI) <msp@baylibre.com> | 2026-09-18 11:17:50 +0200 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2026-10-01 19:35:11 -0500 |
| commit | c9b15cd49b3fbd54f3382655b4e898921a7adb4e (patch) | |
| tree | 3ed9c703204031d580d6acf20f784f474e69bae5 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 93cfb76923603ccaec3720dec065a7874458e67d (diff) | |
arm64: dts: ti: var-som-am62p: Fix wkup R5F memory region size
The wkup_r5fss0_core0_memory_region was reserved with
0x01e00000 but the MCU SDK linker for the wkup R5F firmware on
AM62P defines the DM code/data DDR footprint differently:
/* DDR for DM R5F code/data [ size 27 MiB + 396 KB ] */
DDR : ORIGIN = 0x9CAA5000 LENGTH = 0x1B63000
which results in an end at 0x9e608000. For this memory region which
starts at 0x9c900000 this means a length of:
0x9e608000 - 0x9c900000 = 0x1d08000
Link: https://github.com/TexasInstruments/mcupsdk-core-k3/blob/k3_main/examples/drivers/ipc/ipc_rpmsg_echo_linux/am62px-sk/wkup-r5fss0-0_freertos/ti-arm-clang/linker.cmd
Fixes: 571562e76458 ("arm64: dts: ti: Add support for Variscite VAR-SOM-AM62P")
Reviewed-by: Stefano Radaelli <stefano.r@variscite.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Kendall Willis <k-willis@ti.com>
Signed-off-by: Markus Schneider-Pargmann (TI) <msp@baylibre.com>
Link: https://patch.msgid.link/20260918-topic-am62a-ioddr-dt-v6-19-v9-6-40972ef1f663@baylibre.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions