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| author | Biju Das <biju.das.jz@bp.renesas.com> | 2026-08-26 18:48:45 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-09-14 10:09:59 +0200 |
| commit | d15fecfda23843a1956fcc526fdcddfbc6c982a7 (patch) | |
| tree | c4a75cbcd49e82d18e1a168f76d4783c13e4a33b /tools/perf/scripts/python/stackcollapse.py | |
| parent | e1da651d37279f5db23279da08c435cfb746958e (diff) | |
arm64: dts: renesas: r9a08g046: Add LVDS node
Add LVDS node to RZ/G3L SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260826174854.199139-12-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions