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| author | Biju Das <biju.das.jz@bp.renesas.com> | 2026-08-26 18:48:43 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-09-14 10:09:59 +0200 |
| commit | 3276b31c8ab1a4bf1c65e4d3358d1a9c782b2a0d (patch) | |
| tree | a60237377a60bdea4c3a71fbe419e150510e88bc /tools/perf/scripts/python/task-analyzer.py | |
| parent | 572351429f533500898115a8cd6b74af31ff19ea (diff) | |
arm64: dts: renesas: r9a08g046: Add VSPD node
Add VSPD node to RZ/G3L SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260826174854.199139-10-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions