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| author | Jia Wang <wangjia@ultrarisc.com> | 2026-09-07 17:54:45 +0800 |
|---|---|---|
| committer | Andi Shyti <andi.shyti@kernel.org> | 2026-09-09 18:44:52 +0200 |
| commit | 3d067add128157a8d812a9882c15b7e81097a4f2 (patch) | |
| tree | db20441a4b836fbeafef1460c1c8becdf7fb1e2a /tools/perf/scripts/python/task-analyzer.py | |
| parent | 4c76dc90f2d0f324b0f72faf1c82f8ed17d2ef6b (diff) | |
dt-bindings: i2c: dw: Add compatible for UltraRISC DP1000 SoC
The DP1000 integrates four DesignWare APB I2C controllers. I2C1 supports
SMBus, while I2C0, I2C2, and I2C3 support standard I2C transfers. Each
controller has one register range and uses separate reference and APB
interface clocks.
Add the DP1000-specific compatible string with the generic one as a
fallback.
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
Link: https://patch.msgid.link/20260907-ultrarisc-dts-v2-6-5eb4c97477c5@ultrarisc.com
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions