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| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2026-07-27 11:34:44 +0100 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2026-09-01 17:38:31 +0200 |
| commit | 3db1fb5e1bb4c9eefc554f985f6f3316fa1292e5 (patch) | |
| tree | 73155ac8b112f6574075111424880d3a81617432 /tools/perf/scripts/python/task-analyzer.py | |
| parent | 6b07f8c06caca015a0db69e3f323b5186469bc66 (diff) | |
memory: renesas-rpc-if: Mark XSPI_CDD1BUF0 as volatile
Add XSPI_CDD1BUF0 to the xSPI regmap volatile register table.
XSPI_CDD1BUF0 is a data buffer register used during manual transfers and,
like XSPI_CDD0BUF0, its contents are transient and should not be cached
by regmap. Mark it as volatile so reads always access the hardware
register.
Fixes: 687cac9559d8 ("memory: renesas-rpc-if: Add RZ/G3E xSPI support")
Cc: stable@vger.kernel.org
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://patch.msgid.link/20260727103449.3188105-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions