diff options
| author | Ayman Chaudhry <ayman.chaudhry.kc@renesas.com> | 2026-09-21 13:44:25 +0000 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-09-24 14:01:37 +0200 |
| commit | 48138c57fc8adff248e8ec6c6f414f011f1b6bfe (patch) | |
| tree | 7837b53e8ef50b4ba3c866db5ca5a6fd7bca7912 /tools/perf/scripts/python/task-analyzer.py | |
| parent | cee9395acd8043be0644b25c34bfa86623f2b935 (diff) | |
dt-bindings: clock: Add r8a774a3 CPG Core Clock definitions
Add all the Renesas RZ/G2M v3.0 (a.k.a. R8A774A3) SoC Clock Pulse
Generator Core Clock Outputs, as listed in Table 11.3 ("List of Clocks
[RZ/G2M V1.3, RZ/G2M V3.0]") of the RZ/G2 Hardware User's Manual.
Signed-off-by: Ayman Chaudhry <ayman.chaudhry.kc@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260921134432.50338-6-ayman.chaudhry.kc@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions