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authorAbraham Zukor <abe@maticrobots.com>2026-10-10 12:54:05 -0700
committerMark Brown <broonie@kernel.org>2026-10-15 22:49:52 +0100
commitf8334fdfd858c27f090ce597806794e4a08c9f4f (patch)
tree952b74e8302831291d85e5e8c9d0435f5692a8ce /tools/perf/scripts/python/task-analyzer.py
parent9e44f0df3fff215d9033089e85980048c3ac132a (diff)
spi: tegra114: initialize native chip selects inactive
tegra_spi_probe() initializes SPI_COMMAND1 with only SPI_M_S, leaving CS_POL_INACTIVE clear for every chip select. This drives every native active-low chip select low until tegra_spi_setup() runs for that device. SPI children are registered and probed one at a time. A synchronous probe of an earlier child can therefore transfer while a later child's chip select is still asserted. On a Tegra234 system with active-low devices on CS0 and CS1, this caused both devices to be selected when the CS1 device probed first. Its initialization then intermittently failed. A logic analyzer showed CS0 remained low throughout the CS1 transfer and went high only after the CS1 probe failed. Walk the controller's device tree children before SPI_COMMAND1 is written and set CS_POL_INACTIVE for each valid chip select without spi-cs-high. That way the line is already deasserted when the first child transfers and does not change level when setup runs. Disabled children are walked too. The core only registers available children, so tegra_spi_setup() never runs for a disabled one and probe is the only chance to park its chip select at the level its hardware needs. If an enabled child shares a chip select with disabled ones, its polarity takes priority. If only disabled children use a chip select and they disagree, warn and leave the line inactive high. Fixes: f333a331adfa ("spi/tegra114: add spi driver") Assisted-by: Claude:Opus-5 Signed-off-by: Abraham Zukor <abe@maticrobots.com> Link: https://patch.msgid.link/20261010195503.623287-1-abe@maticrobots.com Signed-off-by: Mark Brown <broonie@kernel.org>
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