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| author | Thierry Reding <treding@nvidia.com> | 2026-09-02 01:20:36 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2026-09-11 12:29:39 +0200 |
| commit | 14f3cc6f85ceaede4c51ab024b2103935c6577ce (patch) | |
| tree | 39de9b76b4daf7e655e59b0f431277e70faba5c4 /tools/perf/scripts/python | |
| parent | 3f80210cd9064d92fd09dcee22af872e92b945a4 (diff) | |
arm64: tegra: Clean up AHUB on Tegra264
Use #address-cells = <1> and #size-cells = <1> because we don't need
64-bit register addressing for this hardware. While at it, also adjust
the ranges property to encompass the entire AHUB range as per the TRM.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
Changes in v2:
- remove strange rebase artifact
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions