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authorEric Biggers <ebiggers@kernel.org>2026-09-01 07:57:34 -0700
committerBorislav Petkov (AMD) <bp@alien8.de>2026-09-05 08:16:47 -0700
commit19c5d90800a24096697dd6c66237218b7ea417ee (patch)
treee40ac7721b7c808c22a77d04cfe935c2c27a2a31 /tools/perf/scripts/python
parent518aa9948e4f2ba69b7066371d3ac8e4d31d604e (diff)
um: Check for missing AVX and AVX-512 xstate bits
If the CPU declares AVX or AVX-512 support, verify that all the corresponding bits are set in the XCR0 register. If any are missing, warn and don't set the corresponding X86_FEATURE_* flags. This eliminates the perceived need for UML-supporting AVX and AVX-512 optimized code in the kernel (that is, lib/raid/ currently) to start checking the XCR0 bits in addition to X86_FEATURE_AVX*. This aligns UML with the vast majority of userspace programs, which check the XCR0 bits before considering AVX and AVX-512 to be supported, as per the procedure documented in Intel's CPU manual. Signed-off-by: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Acked-by: Christoph Hellwig <hch@lst.de> Link: https://patch.msgid.link/20260901145740.42337-3-ebiggers@kernel.org
Diffstat (limited to 'tools/perf/scripts/python')
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