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| author | Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> | 2026-09-08 09:28:06 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-09-08 19:54:51 +0100 |
| commit | 322a9e0850b41a628b59c29be89f499acba9f1c8 (patch) | |
| tree | 48e901f8c5ab436515a73e3912f14d711123d880 /tools/perf/scripts/python | |
| parent | 8ed9306885eb7e242ad0f859e1fbc2d822d3d0eb (diff) | |
ASoC: codecs: lpass-va-macro: switch cache to REGCACHE_MAPLE
REGCACHE_FLAT hides missing-default reads by returning the zero-
initialised cache slot instead of doing a bus read. The caller
can't tell that value apart from a real hardware value, so any
un-defaulted, readable, non-volatile register that gets read
silently returns wrong data. Since commit e062bdfdd6ad ("regmap:
warn users about uninitialized flat cache") regmap dev_warn_once()s
the first such miss, but any subsequent miss stays silent.
Switch to REGCACHE_MAPLE. A cache miss returns -ENOENT and the
regmap core falls back to a real bus read, so the caller always
gets the true hardware value. Write-cache behaviour is unchanged.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Link: https://patch.msgid.link/20260908082806.648797-7-srinivas.kandagatla@oss.qualcomm.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions
