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authorDapeng Mi <dapeng1.mi@linux.intel.com>2026-08-24 16:27:23 +0800
committerPeter Zijlstra <peterz@infradead.org>2026-09-02 13:10:44 +0200
commit3807f6996a0bd9515ff69f3040d6e47f7b20e7a5 (patch)
tree7c2c2f2436bcb547935f760021c2bc02aa0ae9cd /tools/perf/scripts/python
parentb76210d3214730fd5d79387684ae0c56dd580229 (diff)
perf/x86: Support ZMM sampling using sample_simd_vec_reg_* fields
Support sampling of ZMM registers via the sample_simd_vec_reg_* fields. Each ZMM register consists of 8 u64 words. Current x86 hardware supports up to 32 ZMM registers. For ZMM registers from ZMM0 to ZMM15, they are assembled from three parts: XMM (the lower 2 u64 words), YMMH (the middle 2 u64 words), and ZMMH (the upper 4 u64 words). The perf_simd_reg_value() function is responsible for assembling these three parts into a complete ZMM register for output to userspace. For ZMM registers ZMM16 to ZMM31, each register can be read as a whole and directly outputted to userspace. Additionally, sample_simd_vec_reg_qwords should be set to 8 to indicate ZMM sampling. ZMM sampling will be enabled in a subsequent patch that sets PERF_PMU_CAP_SIMD_REGS. Co-developed-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20260824082731.1013973-16-dapeng1.mi@linux.intel.com
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