diff options
| author | Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> | 2026-09-08 09:28:04 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-09-08 19:54:45 +0100 |
| commit | 384bd7cf40530b32e838a38977902de6bc7f4d19 (patch) | |
| tree | 2458b7e39dd8c780302c21bb2ee644a26519ecbf /tools/perf/scripts/python | |
| parent | ce7164c89b5c9c9afe12b97ee3fae93250fdf814 (diff) | |
ASoC: codecs: lpass-rx-macro: switch cache to REGCACHE_MAPLE
REGCACHE_FLAT hides missing-default reads by returning the zero-
initialised cache slot instead of doing a bus read. The caller
can't tell that value apart from a real hardware value, so any
un-defaulted, readable, non-volatile register that gets read
silently returns wrong data. Since commit e062bdfdd6ad ("regmap:
warn users about uninitialized flat cache") regmap dev_warn_once()s
the first such miss, but any subsequent miss stays silent.
Switch to REGCACHE_MAPLE. A cache miss returns -ENOENT and the
regmap core falls back to a real bus read, so the caller always
gets the true hardware value. Write-cache behaviour is unchanged.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Link: https://patch.msgid.link/20260908082806.648797-5-srinivas.kandagatla@oss.qualcomm.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions
