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authorVivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>2026-09-15 10:33:01 -0700
committerBjorn Andersson <bjorn.andersson@oss.qualcomm.com>2026-09-23 17:53:48 -0500
commit5cea6b0bbf1ca6e2b20262b4790aa7b7db48ec04 (patch)
tree73d64c67e2bec0437e12fd35bd37b4e9b0275c8a /tools/perf/scripts/python
parentcee9395acd8043be0644b25c34bfa86623f2b935 (diff)
dt-bindings: clock: qcom: Add Hawi CAMCC compatible strings
The Hawi SoC is a derivative of Kaanapali with an updated camera clock controller (CAMCC). While the overall block structure is similar, Hawi's CAMCC differs from Kaanapali in the following ways: - Uses Taycan EHA-T PLLs instead of Taycan EKO-T PLLs, with an additional ninth PLL (PLL8) - Adds a SQPF block with its own GDSC, AHB clock, and BCR reset - Adds a CX GDSC (CAM_CC_TITAN_TOP_CX_GDSC) for the camera subsystem - Expands ICP from one to two instances (ICP_0 and ICP_1) Due to these differences, Hawi requires its own 'qcom,hawi-camcc' compatible string and a dedicated driver. The BIST MCLK clock controller (CAMBISTMCLKCC) is unchanged between Hawi and Kaanapali, allowing the existing Kaanapali CAMBISTMCLKCC driver to support both SoCs without modification. Add the 'qcom,hawi-camcc' and 'qcom,hawi-cambistmclkcc' compatible strings to the binding, along with the corresponding clock ID header. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com> Link: https://patch.msgid.link/20260915-camcc-hawi-v3-1-5b57f45477f1@oss.qualcomm.com Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
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