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| author | Rudi Heitbaum <rudi@heitbaum.com> | 2026-08-24 03:06:43 +0000 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2026-09-01 20:22:08 +0200 |
| commit | 7c40dc4055b6868c5ee7c4e30fd483544a25a58c (patch) | |
| tree | 632d61ccc4ab48bfd8e1c66e70956efafc4c5869 /tools/perf/scripts/python | |
| parent | e4392d3f56f686082f62e27131f4ac233ee05ac7 (diff) | |
arm64: dts: rockchip: add i2c2 scl timing to rk3399pro-vmarc-som
The hym8563 on i2c2 does not ack:
rtc-hym8563 2-0051: could not init device, -6
It is also the ext_clock for sdio-pwrseq, so wifi does not come up
either.
i2c2 runs at 400 kHz with no scl edge times. The core defaults both to
300 ns and rk3x-i2c calculates a 900 ns high period, which is short for
this bus - it acks at 100 kHz. Set the edges to the values i2c3 already
uses, giving 1050 ns at 400 kHz.
Tested on a Radxa ROCK Pi N10: rtc0 registers and keeps time across a
reboot, and wifi activates.
Signed-off-by: Rudi Heitbaum <rudi@heitbaum.com>
Link: https://patch.msgid.link/aou1Q5-hdF7kRVpe@0d3a7a881997
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions