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authorChuan Liu <chuan.liu@amlogic.com>2026-09-20 18:25:06 +0800
committerNeil Armstrong <neil.armstrong@linaro.org>2026-10-02 11:24:25 +0200
commit8c6e2215b7ce72901e6aa2fecc4166d75e60c7e8 (patch)
tree1595ae061982be54558c6227869a5b676b258d6d /tools/perf/scripts/python
parentabb63af22300c59e0e8dca322c21ed186ba7e51f (diff)
soc: amlogic: clk-measure: Align compatible entries with DT bindings
Reorder the meson_msr_match_table entries to match the order of the compatible strings in the DT binding. Move the newly added clk_msr_a1_data entry accordingly, while keeping the existing SoC-specific data order unchanged. Signed-off-by: Chuan Liu <chuan.liu@amlogic.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260920-more-socs-to-support-clk_measure-v2-4-224382a429e8@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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