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authorMarek Vasut <marek.vasut+renesas@mailbox.org>2026-09-07 12:29:43 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2026-09-14 10:10:00 +0200
commit8cc6efd1514fb7ef1e3d124638e78f5aad52887d (patch)
tree730db7d2c8b28398d3916d901c508785c7fc46bf /tools/perf/scripts/python
parente1b8d6e60400b329b0e5aba037020f052e816e9f (diff)
arm64: dts: renesas: r8a779g0: Add DSC
The Renesas DSC Display Stream Compression is a bridge embedded in the Renesas R-Car V4H SoC. The bridge is placed between the DU and DSI1 units. The current dtsi file does not represent the DSC at all, and thus the pipeline for DSI1 has not been functional. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [tomi.valkeinen: separated the sparrowhawk changes] Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260907-rcar-du-dsc-v6-4-f8ef711a7494@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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