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| author | Marc Zyngier <maz@kernel.org> | 2026-10-11 10:44:26 +0100 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2026-10-11 10:44:26 +0100 |
| commit | fddb6720020f3b7552f1d17f08cc063dc2e0a9d0 (patch) | |
| tree | ef8459651f6f4eb5dbc71e907560919ea9107d19 /tools/perf/scripts/python | |
| parent | 62449bbaef54cb8170390689569f7fa150abf16a (diff) | |
| parent | 46e0f2c9d7d6f99a8f16290d4d4e2f3129edfa54 (diff) | |
Merge branch kvm-arm64/misc-7.4 into kvmarm-master/next
* kvm-arm64/misc-7.4:
: \
: Misc KVM/arm64 fixes for 7.4:
:
: - Correctly report SMCCC_VERSION and SMCCC_ARCH_FEATURES as implemented
:
: - Don't register a page table dumper for pKVM VMs, as S2 is not
: accessible when in protected mode
:
: - Drop PAGE_SIZE alignment requirement for hyp trace event sections
:
: - Tighten PMUv3 being disabled for the guest even if vcpus were created
: with one.
:
: - Fix timer emulation when the HW doesn't support offsetting of the
: counter.
: /
KVM: arm64: selftests: Test a timer set past the counter's wrap
KVM: arm64: nv: Read a guest hypervisor's CNTV_CVAL_EL0 from memory on x1e
KVM: arm64: timers: Compute an offset-applied CVAL from the current count
KVM: arm64: Check ID_AA64DFR0_EL1.PMUVer in pmu_visibility()
KVM: arm64: Handle ID_AA64DFR0_EL1.PMUVer == NI in __kvm_pmu_event_mask()
KVM: arm64: Remove PAGE_SIZE alignment for hyp event ELF sections
KVM: arm64: Disable stage-2 ptdump of pKVM
KVM: arm64: selftests: Check the mandatory SMCCC_ARCH_FEATURES queries
KVM: arm64: Report SMCCC_VERSION and SMCCC_ARCH_FEATURES as implemented
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions
