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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2026-03-11 20:30:25 +0100 |
|---|---|---|
| committer | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2026-03-19 07:58:52 +0100 |
| commit | 340bba73c545bfc7e8fcbc5ee4c02f85088f024d (patch) | |
| tree | 86fd4f3c8fd3beb4c7aef533de2f8467b954cca6 /tools | |
| parent | 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f (diff) | |
pinctrl: intel: Improve capability support
The register space of a certain capability starts at the offset just after
the respective node in the capability list. It means that there are no fixed
offsets for them from SoC to SoC generation and they have to be calculated
at run-time. Improve capability support by adding the respective calculation
algorithm and in the result enable PWM on more platforms that currently may
use the wrong register.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Diffstat (limited to 'tools')
0 files changed, 0 insertions, 0 deletions