diff options
6 files changed, 333 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml b/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml index 0f2501f72cca..c3e14eb6cfff 100644 --- a/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml +++ b/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml @@ -29,7 +29,10 @@ properties: - const: allwinner,sun8i-r40-dma - const: allwinner,sun50i-a64-dma - items: - - const: allwinner,sun50i-h616-dma + - enum: + - allwinner,sun50i-h616-dma + - allwinner,sun55i-a523-dma + - allwinner,sun55i-a523-mcu-dma - const: allwinner,sun50i-a100-dma reg: diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi index ceedae9e399b..8d1110c14bad 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi @@ -305,6 +305,42 @@ }; /omit-if-no-ref/ + nand_pins: nand-pins { + pins = "PC0", "PC1", "PC2", "PC5", "PC8", "PC9", + "PC10", "PC11", "PC12", "PC13", "PC14", + "PC15", "PC16"; + function = "nand0"; + }; + + /omit-if-no-ref/ + nand_cs0_pin: nand-cs0-pin { + pins = "PC4"; + function = "nand0"; + bias-pull-up; + }; + + /omit-if-no-ref/ + nand_cs1_pin: nand-cs1-pin { + pins = "PC3"; + function = "nand0"; + bias-pull-up; + }; + + /omit-if-no-ref/ + nand_rb0_pin: nand-rb0-pin { + pins = "PC6"; + function = "nand0"; + bias-pull-up; + }; + + /omit-if-no-ref/ + nand_rb1_pin: nand-rb1-pin { + pins = "PC7"; + function = "nand0"; + bias-pull-up; + }; + + /omit-if-no-ref/ spi0_pins: spi0-pins { pins = "PC0", "PC2", "PC4"; function = "spi0"; @@ -377,6 +413,22 @@ #iommu-cells = <1>; }; + nfc: nand-controller@4011000 { + compatible = "allwinner,sun50i-h616-nand-controller"; + reg = <0x04011000 0x1000>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND0>, + <&ccu CLK_NAND1>, <&ccu CLK_MBUS_NAND>; + clock-names = "ahb", "mod", "ecc", "mbus"; + resets = <&ccu RST_BUS_NAND>; + reset-names = "ahb"; + dmas = <&dma 10>; + dma-names = "rxtx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + mmc0: mmc@4020000 { compatible = "allwinner,sun50i-h616-mmc", "allwinner,sun50i-a100-mmc"; diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi index 7b36c47a3a13..42dab01e3f56 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi @@ -145,6 +145,14 @@ interrupt-controller; #interrupt-cells = <3>; + /omit-if-no-ref/ + i2s2_pi_pins: i2s2-pi-pins { + pins = "PI2", "PI3", "PI4", "PI5"; + allwinner,pinmux = <5>; + function = "i2s2"; + bias-disable; + }; + mmc0_pins: mmc0-pins { pins = "PF0" ,"PF1", "PF2", "PF3", "PF4", "PF5"; allwinner,pinmux = <2>; @@ -182,6 +190,30 @@ bias-disable; }; + rgmii1_pins: rgmii1-pins { + pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", + "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", + "PJ11", "PJ12", "PJ13", "PJ14", "PJ15"; + allwinner,pinmux = <5>; + function = "gmac1"; + drive-strength = <40>; + bias-disable; + }; + + /omit-if-no-ref/ + spdif_out_pb_pin: spdif-pb-pin { + pins = "PB8"; + function = "spdif"; + allwinner,pinmux = <2>; + }; + + /omit-if-no-ref/ + spdif_out_pi_pin: spdif-pi-pin { + pins = "PI10"; + function = "spdif"; + allwinner,pinmux = <2>; + }; + uart0_pb_pins: uart0-pb-pins { pins = "PB9", "PB10"; allwinner,pinmux = <2>; @@ -231,6 +263,8 @@ reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART0>; resets = <&ccu RST_BUS_UART0>; + dmas = <&dma 14>, <&dma 14>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -242,6 +276,8 @@ reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART1>; resets = <&ccu RST_BUS_UART1>; + dmas = <&dma 15>, <&dma 15>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -253,6 +289,8 @@ reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART2>; resets = <&ccu RST_BUS_UART2>; + dmas = <&dma 16>, <&dma 16>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -264,6 +302,8 @@ reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART3>; resets = <&ccu RST_BUS_UART3>; + dmas = <&dma 17>, <&dma 17>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -275,6 +315,8 @@ reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART4>; resets = <&ccu RST_BUS_UART4>; + dmas = <&dma 18>, <&dma 18>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -286,6 +328,8 @@ reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART5>; resets = <&ccu RST_BUS_UART5>; + dmas = <&dma 19>, <&dma 19>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -297,6 +341,8 @@ reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART6>; resets = <&ccu RST_BUS_UART6>; + dmas = <&dma 20>, <&dma 20>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -308,6 +354,8 @@ reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART7>; resets = <&ccu RST_BUS_UART7>; + dmas = <&dma 21>, <&dma 21>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -319,6 +367,8 @@ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_I2C0>; resets = <&ccu RST_BUS_I2C0>; + dmas = <&dma 43>, <&dma 43>; + dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -332,6 +382,8 @@ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_I2C1>; resets = <&ccu RST_BUS_I2C1>; + dmas = <&dma 44>, <&dma 44>; + dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -345,6 +397,8 @@ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_I2C2>; resets = <&ccu RST_BUS_I2C2>; + dmas = <&dma 45>, <&dma 45>; + dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -358,6 +412,8 @@ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_I2C3>; resets = <&ccu RST_BUS_I2C3>; + dmas = <&dma 46>, <&dma 46>; + dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -371,6 +427,8 @@ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_I2C4>; resets = <&ccu RST_BUS_I2C4>; + dmas = <&dma 47>, <&dma 47>; + dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -384,6 +442,8 @@ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_I2C5>; resets = <&ccu RST_BUS_I2C5>; + dmas = <&dma 48>, <&dma 48>; + dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -398,6 +458,19 @@ ranges; }; + dma: dma-controller@3002000 { + compatible = "allwinner,sun55i-a523-dma", + "allwinner,sun50i-a100-dma"; + reg = <0x03002000 0x1000>; + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>; + clock-names = "bus", "mbus"; + dma-channels = <16>; + dma-requests = <54>; + resets = <&ccu RST_BUS_DMA>; + #dma-cells = <1>; + }; + sid: efuse@3006000 { compatible = "allwinner,sun55i-a523-sid", "allwinner,sun50i-a64-sid"; @@ -603,6 +676,51 @@ }; }; + gmac1: ethernet@4510000 { + compatible = "allwinner,sun55i-a523-gmac200", + "snps,dwmac-4.20a"; + reg = <0x04510000 0x10000>; + clocks = <&ccu CLK_BUS_EMAC1>, <&ccu CLK_MBUS_EMAC1>; + clock-names = "stmmaceth", "mbus"; + resets = <&ccu RST_BUS_EMAC1>; + reset-names = "stmmaceth"; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins>; + power-domains = <&pck600 PD_VO1>; + syscon = <&syscon>; + snps,fixed-burst; + snps,axi-config = <&gmac1_stmmac_axi_setup>; + snps,mtl-rx-config = <&gmac1_mtl_rx_setup>; + snps,mtl-tx-config = <&gmac1_mtl_tx_setup>; + status = "disabled"; + + mdio1: mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + }; + + gmac1_mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <1>; + + queue0 {}; + }; + + gmac1_stmmac_axi_setup: stmmac-axi-config { + snps,wr_osr_lmt = <0xf>; + snps,rd_osr_lmt = <0xf>; + snps,blen = <256 128 64 32 16 8 4>; + }; + + gmac1_mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <1>; + + queue0 {}; + }; + }; + ppu: power-controller@7001400 { compatible = "allwinner,sun55i-a523-ppu"; reg = <0x07001400 0x400>; @@ -674,6 +792,8 @@ reg = <0x07081400 0x400>; interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; clocks = <&r_ccu CLK_BUS_R_I2C0>; + dmas = <&dma 49>, <&dma 49>; + dma-names = "rx", "tx"; resets = <&r_ccu RST_BUS_R_I2C0>; pinctrl-names = "default"; pinctrl-0 = <&r_i2c_pins>; @@ -720,6 +840,90 @@ #reset-cells = <1>; }; + i2s0: i2s@7112000 { + compatible = "allwinner,sun55i-a523-i2s", + "allwinner,sun50i-r329-i2s"; + reg = <0x07112000 0x1000>; + interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mcu_ccu CLK_BUS_MCU_I2S0>, <&mcu_ccu CLK_MCU_I2S0>; + clock-names = "apb", "mod"; + resets = <&mcu_ccu RST_BUS_MCU_I2S0>; + dmas = <&mcu_dma 3>, <&mcu_dma 3>; + dma-names = "rx", "tx"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + i2s1: i2s@7113000 { + compatible = "allwinner,sun55i-a523-i2s", + "allwinner,sun50i-r329-i2s"; + reg = <0x07113000 0x1000>; + interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mcu_ccu CLK_BUS_MCU_I2S1>, <&mcu_ccu CLK_MCU_I2S1>; + clock-names = "apb", "mod"; + resets = <&mcu_ccu RST_BUS_MCU_I2S1>; + dmas = <&mcu_dma 4>, <&mcu_dma 4>; + dma-names = "rx", "tx"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + i2s2: i2s@7114000 { + compatible = "allwinner,sun55i-a523-i2s", + "allwinner,sun50i-r329-i2s"; + reg = <0x07114000 0x1000>; + interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mcu_ccu CLK_BUS_MCU_I2S2>, <&mcu_ccu CLK_MCU_I2S2>; + clock-names = "apb", "mod"; + resets = <&mcu_ccu RST_BUS_MCU_I2S2>; + dmas = <&mcu_dma 5>, <&mcu_dma 5>; + dma-names = "rx", "tx"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + i2s3: i2s@7115000 { + compatible = "allwinner,sun55i-a523-i2s", + "allwinner,sun50i-r329-i2s"; + reg = <0x07115000 0x1000>; + interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mcu_ccu CLK_BUS_MCU_I2S3>, <&mcu_ccu CLK_MCU_I2S3>; + clock-names = "apb", "mod"; + resets = <&mcu_ccu RST_BUS_MCU_I2S3>; + dmas = <&mcu_dma 6>, <&mcu_dma 6>; + dma-names = "rx", "tx"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + spdif: spdif@7116000 { + compatible = "allwinner,sun55i-a523-spdif"; + reg = <0x07116000 0x400>; + interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mcu_ccu CLK_BUS_MCU_SPDIF>, + <&mcu_ccu CLK_MCU_SPDIF_TX>, + <&mcu_ccu CLK_MCU_SPDIF_RX>; + clock-names = "apb", "tx", "rx"; + resets = <&mcu_ccu RST_BUS_MCU_SPDIF>; + dmas = <&mcu_dma 2>, <&mcu_dma 2>; + dma-names = "rx", "tx"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + mcu_dma: dma-controller@7121000 { + compatible = "allwinner,sun55i-a523-mcu-dma", + "allwinner,sun50i-a100-dma"; + reg = <0x07121000 0x1000>; + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mcu_ccu CLK_BUS_MCU_DMA>, <&mcu_ccu CLK_MCU_MBUS_DMA>; + clock-names = "bus", "mbus"; + dma-channels = <16>; + dma-requests = <15>; + resets = <&mcu_ccu RST_BUS_MCU_DMA>; + #dma-cells = <1>; + }; + npu: npu@7122000 { compatible = "vivante,gc"; reg = <0x07122000 0x1000>; diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts index f82a8d121697..bfdf1728cd14 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts +++ b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts @@ -14,6 +14,7 @@ aliases { ethernet0 = &gmac0; + ethernet1 = &gmac1; serial0 = &uart0; }; @@ -75,7 +76,7 @@ &gmac0 { phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; + phy-handle = <&ext_rgmii0_phy>; phy-supply = <®_cldo3>; allwinner,tx-delay-ps = <300>; @@ -84,13 +85,24 @@ status = "okay"; }; +&gmac1 { + phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii1_phy>; + phy-supply = <®_cldo4>; + + tx-internal-delay-ps = <300>; + rx-internal-delay-ps = <400>; + + status = "okay"; +}; + &gpu { mali-supply = <®_dcdc2>; status = "okay"; }; &mdio0 { - ext_rgmii_phy: ethernet-phy@1 { + ext_rgmii0_phy: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <1>; reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */ @@ -99,6 +111,16 @@ }; }; +&mdio1 { + ext_rgmii1_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + reset-gpios = <&pio 9 16 GPIO_ACTIVE_LOW>; /* PJ16 */ + reset-assert-us = <10000>; + reset-deassert-us = <150000>; + }; +}; + &mmc0 { vmmc-supply = <®_cldo3>; cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */ @@ -250,6 +272,8 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = "vcc-pj-phy"; + /* enough time for the PHY to fully power on */ + regulator-enable-ramp-delay = <150000>; }; reg_cpusldo: cpusldo { diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts index 1b054fa8ef74..054d0357c139 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts +++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts @@ -13,6 +13,7 @@ aliases { ethernet0 = &gmac0; + ethernet1 = &gmac1; serial0 = &uart0; }; @@ -73,7 +74,7 @@ &gmac0 { phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; + phy-handle = <&ext_rgmii0_phy>; phy-supply = <®_dcdc4>; allwinner,tx-delay-ps = <100>; @@ -82,13 +83,24 @@ status = "okay"; }; +&gmac1 { + phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii1_phy>; + phy-supply = <®_dcdc4>; + + tx-internal-delay-ps = <100>; + rx-internal-delay-ps = <100>; + + status = "okay"; +}; + &gpu { mali-supply = <®_dcdc2>; status = "okay"; }; &mdio0 { - ext_rgmii_phy: ethernet-phy@1 { + ext_rgmii0_phy: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <1>; reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */ @@ -97,6 +109,16 @@ }; }; +&mdio1 { + ext_rgmii1_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + reset-gpios = <&pio 9 16 GPIO_ACTIVE_LOW>; /* PJ16 */ + reset-assert-us = <10000>; + reset-deassert-us = <150000>; + }; +}; + &mmc0 { vmmc-supply = <®_cldo3>; cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */ diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts index 39a4e194712a..9e6b21cf293e 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts +++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts @@ -15,6 +15,7 @@ compatible = "xunlong,orangepi-4a", "allwinner,sun55i-t527"; aliases { + ethernet0 = &gmac1; serial0 = &uart0; }; @@ -102,11 +103,33 @@ status = "okay"; }; +&gmac1 { + phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_cldo4>; + + tx-internal-delay-ps = <0>; + rx-internal-delay-ps = <300>; + + status = "okay"; +}; + &gpu { mali-supply = <®_dcdc2>; status = "okay"; }; +&mdio1 { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + interrupts-extended = <&pio 8 16 IRQ_TYPE_LEVEL_LOW>; /* PI16 */ + reset-gpios = <&pio 8 15 GPIO_ACTIVE_LOW>; /* PI15 */ + reset-assert-us = <10000>; + reset-deassert-us = <150000>; + }; +}; + &mmc0 { vmmc-supply = <®_cldo3>; cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */ |