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-rw-r--r--Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml17
-rw-r--r--Documentation/devicetree/bindings/mfd/atmel,hlcdc.yaml1
-rw-r--r--Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml1
-rw-r--r--Documentation/devicetree/bindings/mfd/bitmain,bm1880-sctrl.yaml66
-rw-r--r--Documentation/devicetree/bindings/mfd/da9055.txt2
-rw-r--r--Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml1
-rw-r--r--Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml1
-rw-r--r--Documentation/devicetree/bindings/mfd/nxp,lpc3220-scb.yaml74
-rw-r--r--Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml6
-rw-r--r--Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml1
-rw-r--r--Documentation/devicetree/bindings/mfd/rockchip,rk801.yaml197
-rw-r--r--Documentation/devicetree/bindings/mfd/syscon.yaml5
12 files changed, 371 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
index da1887d7a8fe..a87f31fce019 100644
--- a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
+++ b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
@@ -130,6 +130,23 @@ patternProperties:
- description: silicon id information registers
- description: unique chip id registers
+ '^smp-memram@[0-9a-f]+$':
+ description: Memory region used for the AST2600's custom SMP bringup protocol
+ type: object
+ additionalProperties: false
+
+ properties:
+ compatible:
+ const: aspeed,ast2600-smpmem
+
+ reg:
+ description: The SMP memory region
+ maxItems: 1
+
+ required:
+ - compatible
+ - reg
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/mfd/atmel,hlcdc.yaml b/Documentation/devicetree/bindings/mfd/atmel,hlcdc.yaml
index 4aa36903e755..dfee8707bac2 100644
--- a/Documentation/devicetree/bindings/mfd/atmel,hlcdc.yaml
+++ b/Documentation/devicetree/bindings/mfd/atmel,hlcdc.yaml
@@ -25,6 +25,7 @@ properties:
- atmel,sama5d4-hlcdc
- microchip,sam9x60-hlcdc
- microchip,sam9x75-xlcdc
+ - microchip,sama7d65-xlcdc
reg:
maxItems: 1
diff --git a/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml b/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
index c7d6cf96796c..5e5dec2f6564 100644
--- a/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
+++ b/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
@@ -20,6 +20,7 @@ properties:
- const: atmel,sama5d2-flexcom
- items:
- enum:
+ - microchip,lan9691-flexcom
- microchip,sam9x7-flexcom
- microchip,sama7d65-flexcom
- microchip,sama7g5-flexcom
diff --git a/Documentation/devicetree/bindings/mfd/bitmain,bm1880-sctrl.yaml b/Documentation/devicetree/bindings/mfd/bitmain,bm1880-sctrl.yaml
new file mode 100644
index 000000000000..3cdc90ba421b
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/bitmain,bm1880-sctrl.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/bitmain,bm1880-sctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Bitmain BM1880 System Controller
+
+maintainers:
+ - Manivannan Sadhasivam <mani@kernel.org>
+
+properties:
+ compatible:
+ items:
+ - const: bitmain,bm1880-sctrl
+ - const: syscon
+ - const: simple-mfd
+
+ reg:
+ maxItems: 1
+
+ ranges: true
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 1
+
+patternProperties:
+ '^pinctrl@[0-9a-f]+$':
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ contains:
+ const: bitmain,bm1880-pinctrl
+
+ '^clock-controller@[0-9a-f]+$':
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ contains:
+ const: bitmain,bm1880-clk
+
+ '^reset-controller@[0-9a-f]+$':
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ contains:
+ const: bitmain,bm1880-reset
+
+required:
+ - compatible
+ - reg
+ - ranges
+ - '#address-cells'
+ - '#size-cells'
+
+additionalProperties: false
+...
diff --git a/Documentation/devicetree/bindings/mfd/da9055.txt b/Documentation/devicetree/bindings/mfd/da9055.txt
index 131a53283e17..d3099bf56002 100644
--- a/Documentation/devicetree/bindings/mfd/da9055.txt
+++ b/Documentation/devicetree/bindings/mfd/da9055.txt
@@ -15,7 +15,7 @@ The CODEC device in DA9055 has a separate, configurable I2C address and so
is instantiated separately from the PMIC.
For details on accompanying CODEC I2C device, see the following:
-Documentation/devicetree/bindings/sound/da9055.txt
+Documentation/devicetree/bindings/sound/trivial-codec.yaml
======
diff --git a/Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml b/Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml
index 6a89b479d10f..05c121b0cb3d 100644
--- a/Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml
+++ b/Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml
@@ -90,6 +90,7 @@ properties:
- enum:
- mediatek,mt6323-regulator
- mediatek,mt6328-regulator
+ - mediatek,mt6331-regulator
- mediatek,mt6358-regulator
- mediatek,mt6359-regulator
- mediatek,mt6397-regulator
diff --git a/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml b/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml
index 1cb9d6797b92..4cafa381979b 100644
--- a/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml
+++ b/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml
@@ -19,6 +19,7 @@ properties:
compatible:
items:
- enum:
+ - mediatek,mt6795-scpsys
- mediatek,mt6893-scpsys
- mediatek,mt8167-scpsys
- mediatek,mt8173-scpsys
diff --git a/Documentation/devicetree/bindings/mfd/nxp,lpc3220-scb.yaml b/Documentation/devicetree/bindings/mfd/nxp,lpc3220-scb.yaml
new file mode 100644
index 000000000000..b993dd15135a
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/nxp,lpc3220-scb.yaml
@@ -0,0 +1,74 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/nxp,lpc3220-scb.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP LPC32xx System Control Block
+
+maintainers:
+ - Vladimir Zapolskiy <vz@mleia.com>
+
+description:
+ NXP LPC32xx SoC series have a System Control Block, which serves for
+ a multitude of purposes including clock management, DMA muxes, storing
+ SoC unique ID etc.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - nxp,lpc3220-scb
+ - const: syscon
+ - const: simple-mfd
+
+ reg:
+ maxItems: 1
+
+ ranges: true
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+patternProperties:
+ "^clock-controller@[0-9a-f]+$":
+ $ref: /schemas/clock/nxp,lpc3220-clk.yaml#
+
+ "^dma-router@[0-9a-f]+$":
+ $ref: /schemas/dma/nxp,lpc3220-dmamux.yaml#
+
+required:
+ - compatible
+ - reg
+ - "#address-cells"
+ - "#size-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ syscon@400040000 {
+ compatible = "nxp,lpc3220-scb", "syscon", "simple-mfd";
+ reg = <0x40004000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x40004000 0x1000>;
+
+ clock-controller@0 {
+ compatible = "nxp,lpc3220-clk";
+ reg = <0x0 0x114>;
+ clocks = <&xtal_32k>, <&xtal>;
+ clock-names = "xtal_32k", "xtal";
+ #clock-cells = <1>;
+ };
+
+ dma-router@78 {
+ compatible = "nxp,lpc3220-dmamux";
+ reg = <0x78 0x8>;
+ dma-masters = <&dma>;
+ #dma-cells = <3>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
index 65c80e3b4500..e5931d18d998 100644
--- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
+++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
@@ -77,8 +77,12 @@ properties:
- qcom,pmc8180
- qcom,pmc8180c
- qcom,pmc8380
+ - qcom,pmcx0102
- qcom,pmd8028
- qcom,pmd9635
+ - qcom,pmh0101
+ - qcom,pmh0104
+ - qcom,pmh0110
- qcom,pmi632
- qcom,pmi8950
- qcom,pmi8962
@@ -89,6 +93,7 @@ properties:
- qcom,pmk8002
- qcom,pmk8350
- qcom,pmk8550
+ - qcom,pmk8850
- qcom,pmm8155au
- qcom,pmm8654au
- qcom,pmp8074
@@ -101,6 +106,7 @@ properties:
- qcom,pmx75
- qcom,smb2351
- qcom,smb2360
+ - qcom,smb2370
- const: qcom,spmi-pmic
reg:
diff --git a/Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml b/Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml
index 5454d9403cad..12e738b1270a 100644
--- a/Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml
+++ b/Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml
@@ -16,6 +16,7 @@ description:
properties:
compatible:
enum:
+ - qnap,ts133-mcu
- qnap,ts233-mcu
- qnap,ts433-mcu
diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk801.yaml b/Documentation/devicetree/bindings/mfd/rockchip,rk801.yaml
new file mode 100644
index 000000000000..7c71447200ba
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/rockchip,rk801.yaml
@@ -0,0 +1,197 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/rockchip,rk801.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: RK801 Power Management Integrated Circuit
+
+maintainers:
+ - Joseph Chen <chenjh@rock-chips.com>
+
+description: |
+ Rockchip RK801 series PMIC. This device consists of an i2c controlled MFD
+ that includes multiple switchable regulators.
+
+properties:
+ compatible:
+ enum:
+ - rockchip,rk801
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ system-power-controller:
+ type: boolean
+ description:
+ Telling whether or not this PMIC is controlling the system power.
+
+ wakeup-source:
+ type: boolean
+ description:
+ Device can be used as a wakeup source.
+
+ vcc1-supply:
+ description:
+ The input supply for dcdc1.
+
+ vcc2-supply:
+ description:
+ The input supply for dcdc2.
+
+ vcc3-supply:
+ description:
+ The input supply for dcdc3.
+
+ vcc4-supply:
+ description:
+ The input supply for dcdc4.
+
+ vcc5-supply:
+ description:
+ The input supply for ldo1.
+
+ vcc6-supply:
+ description:
+ The input supply for ldo2.
+
+ vcc7-supply:
+ description:
+ The input supply for switch.
+
+ regulators:
+ type: object
+ patternProperties:
+ "^(dcdc[1-4]|ldo[1-2]|switch)$":
+ type: object
+ $ref: /schemas/regulator/regulator.yaml#
+ unevaluatedProperties: false
+ additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/pinctrl/rockchip.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/gpio/gpio.h>
+
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rk801: pmic@27 {
+ compatible = "rockchip,rk801";
+ reg = <0x27>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PC0 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int_l>;
+ system-power-controller;
+ wakeup-source;
+
+ vcc1-supply = <&vcc_sys>;
+ vcc2-supply = <&vcc_sys>;
+ vcc3-supply = <&vcc_sys>;
+ vcc4-supply = <&vcc_sys>;
+ vcc5-supply = <&vcc3v3_sys>;
+ vcc6-supply = <&vcc3v3_sys>;
+ vcc7-supply = <&vcc3v3_sys>;
+
+ regulators {
+ vdd_cpu: dcdc1 {
+ regulator-name = "vdd_cpu";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-initial-mode = <0x1>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-mode = <0x2>;
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vcc3v3_sys: dcdc2 {
+ regulator-name = "vcc3v3_sys";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-initial-mode = <0x1>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-mode = <0x2>;
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_ddr: dcdc3 {
+ regulator-name = "vcc_ddr";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-mode = <0x2>;
+ regulator-on-in-suspend;
+ };
+ };
+
+ vdd_logic: dcdc4 {
+ regulator-name = "vdd_logic";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-initial-mode = <0x1>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-mode = <0x2>;
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <900000>;
+ };
+ };
+
+ vdd0v9_sys: ldo1 {
+ regulator-name = "vdd0v9_sys";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <900000>;
+ };
+ };
+
+ vcc_1v8: ldo2 {
+ regulator-name = "vcc_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_3v3: switch {
+ regulator-name = "vcc_3v3";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index 55efb83b1495..e57add2bacd3 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -102,6 +102,8 @@ select:
- mstar,msc313-pmsleep
- nuvoton,ma35d1-sys
- nuvoton,wpcm450-shm
+ - nxp,s32g2-gpr
+ - nxp,s32g3-gpr
- qcom,apq8064-mmss-sfpb
- qcom,apq8064-sps-sic
- rockchip,px30-qos
@@ -195,6 +197,7 @@ properties:
- mediatek,mt2701-pctl-a-syscfg
- mediatek,mt2712-pctl-a-syscfg
- mediatek,mt6397-pctl-pmic-syscfg
+ - mediatek,mt7981-topmisc
- mediatek,mt7988-topmisc
- mediatek,mt8135-pctl-a-syscfg
- mediatek,mt8135-pctl-b-syscfg
@@ -212,6 +215,8 @@ properties:
- mstar,msc313-pmsleep
- nuvoton,ma35d1-sys
- nuvoton,wpcm450-shm
+ - nxp,s32g2-gpr
+ - nxp,s32g3-gpr
- qcom,apq8064-mmss-sfpb
- qcom,apq8064-sps-sic
- rockchip,px30-qos