diff options
Diffstat (limited to 'arch/arm64/boot/dts/ti')
66 files changed, 6228 insertions, 155 deletions
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 743115b849a7..ba01a929e06f 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -37,6 +37,9 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62a7-phyboard-lyra-rdk.dtb # Boards with AM62Dx SoC dtb-$(CONFIG_ARCH_K3) += k3-am62d2-evm.dtb +# Boards with AM62Lx SoCs +dtb-$(CONFIG_ARCH_K3) += k3-am62l3-evm.dtb + # Boards with AM62Px SoC dtb-$(CONFIG_ARCH_K3) += k3-am62p5-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am62p5-var-som-symphony.dtb @@ -116,9 +119,11 @@ dtb-$(CONFIG_ARCH_K3) += k3-j7200-evm-pcie1-ep.dtbo # Boards with J721e SoC k3-j721e-evm-dtbs := k3-j721e-common-proc-board.dtb k3-j721e-evm-quad-port-eth-exp.dtbo +k3-j721e-evm-gesi-dtbs := k3-j721e-common-proc-board.dtb k3-j721e-evm-gesi-exp-board.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j721e-beagleboneai64.dtb dtb-$(CONFIG_ARCH_K3) += k3-j721e-common-proc-board-infotainment.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm.dtb +dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-gesi.dtb dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-gesi-exp-board.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-pcie0-ep.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-pcie1-ep.dtbo @@ -137,12 +142,24 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-usb0-type-a.dtbo # Boards with J722s SoC +k3-am67a-kontron-sa67-dtbs := k3-am67a-kontron-sa67-base.dtb \ + k3-am67a-kontron-sa67-rtc-rv8263.dtbo k3-am67a-kontron-sa67-gbe1.dtbo +k3-am67a-kontron-sa67-ads2-dtbs := k3-am67a-kontron-sa67.dtb k3-am67a-kontron-sa67-ads2.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-base.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-gbe1.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-gpios.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-rtc-rv8263.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-ads2.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-ads2.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo # Boards with J784s4 SoC +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-clover.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-pcie0-ep.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb @@ -177,6 +194,17 @@ k3-am625-sk-csi2-tevi-ov5640-dtbs := k3-am625-sk.dtb \ k3-am62x-sk-csi2-tevi-ov5640.dtbo k3-am625-sk-hdmi-audio-dtbs := k3-am625-sk.dtb k3-am62x-sk-hdmi-audio.dtbo k3-am62-lp-sk-hdmi-audio-dtbs := k3-am62-lp-sk.dtb k3-am62x-sk-hdmi-audio.dtbo +k3-am62-lp-sk-nand-dtbs := k3-am62-lp-sk.dtb k3-am62-lp-sk-nand.dtbo +k3-am62a7-phyboard-lyra-disable-eth-phy-dtbs := k3-am62a7-phyboard-lyra-rdk.dtb \ + k3-am6xx-phycore-disable-eth-phy.dtbo +k3-am62a7-phyboard-lyra-disable-rtc-dtbs := k3-am62a7-phyboard-lyra-rdk.dtb \ + k3-am6xx-phycore-disable-rtc.dtbo +k3-am62a7-phyboard-lyra-disable-spi-nor-dtbs := k3-am62a7-phyboard-lyra-rdk.dtb \ + k3-am6xx-phycore-disable-spi-nor.dtbo +k3-am62a7-phyboard-lyra-gpio-fan-dtbs := k3-am62a7-phyboard-lyra-rdk.dtb \ + k3-am62x-phyboard-lyra-gpio-fan.dtbo +k3-am62a7-phyboard-lyra-qspi-nor-dtbs := k3-am62a7-phyboard-lyra-rdk.dtb \ + k3-am6xx-phycore-qspi-nor.dtbo k3-am62a7-sk-csi2-imx219-dtbs := k3-am62a7-sk.dtb \ k3-am62x-sk-csi2-imx219.dtbo k3-am62a7-sk-csi2-ov5640-dtbs := k3-am62a7-sk.dtb \ @@ -216,6 +244,8 @@ k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \ k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs := \ k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo +k3-am67a-kontron-sa67-base-gpios-dtbs := \ + k3-am67a-kontron-sa67-base.dtb k3-am67a-kontron-sa67-gpios.dtbo k3-am68-sk-base-board-csi2-dual-imx219-dtbs := k3-am68-sk-base-board.dtb \ k3-j721e-sk-csi2-dual-imx219.dtbo k3-am68-sk-base-board-pcie1-ep-dtbs := k3-am68-sk-base-board.dtb \ @@ -254,11 +284,22 @@ k3-j784s4-evm-usxgmii-exp1-exp2-dtbs := k3-j784s4-evm.dtb \ k3-j784s4-evm-usxgmii-exp1-exp2.dtbo dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am625-beagleplay-csi2-tevi-ov5640.dtb \ + k3-am625-phyboard-lyra-disable-eth-phy.dtb \ + k3-am625-phyboard-lyra-disable-rtc.dtb \ + k3-am625-phyboard-lyra-disable-spi-nor.dtb \ + k3-am625-phyboard-lyra-gpio-fan.dtb \ + k3-am625-phyboard-lyra-qspi-nor.dtb \ k3-am625-sk-csi2-imx219.dtb \ k3-am625-sk-csi2-ov5640.dtb \ k3-am625-sk-csi2-tevi-ov5640.dtb \ k3-am625-sk-hdmi-audio.dtb \ k3-am62-lp-sk-hdmi-audio.dtb \ + k3-am62-lp-sk-nand.dtb \ + k3-am62a7-phyboard-lyra-disable-eth-phy.dtb \ + k3-am62a7-phyboard-lyra-disable-rtc.dtb \ + k3-am62a7-phyboard-lyra-disable-spi-nor.dtb \ + k3-am62a7-phyboard-lyra-gpio-fan.dtb \ + k3-am62a7-phyboard-lyra-qspi-nor.dtb \ k3-am62a7-sk-csi2-imx219.dtb \ k3-am62a7-sk-csi2-ov5640.dtb \ k3-am62a7-sk-hdmi-audio.dtb \ @@ -268,8 +309,16 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am642-evm-icssg1-dualemac.dtb \ k3-am642-evm-icssg1-dualemac-mii.dtb \ k3-am642-evm-pcie0-ep.dtb \ + k3-am642-phyboard-electra-disable-eth-phy.dtb \ + k3-am642-phyboard-electra-disable-rtc.dtb \ + k3-am642-phyboard-electra-disable-spi-nor.dtb \ + k3-am642-phyboard-electra-gpio-fan.dtb \ + k3-am642-phyboard-electra-pcie-usb2.dtb \ + k3-am642-phyboard-electra-peb-c-010.dtb \ + k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtb \ k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb \ k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \ + k3-am67a-kontron-sa67-base-gpios.dtb \ k3-am68-sk-base-board-csi2-dual-imx219.dtb \ k3-am68-sk-base-board-pcie1-ep.dtb \ k3-am69-sk-csi2-dual-imx219.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts index ecfba05fe5c2..3e2d8f669535 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts @@ -181,6 +181,10 @@ vqmmc-supply = <&vddshv_sdio>; }; +&cpsw3g { + status = "okay"; +}; + &cpsw_port2 { status = "disabled"; }; @@ -276,3 +280,63 @@ &gpmc0 { ranges = <0 0 0x00 0x51000000 0x01000000>; /* CS0 space. Min partition = 16MB */ }; + +&mcu_mcan0 { + pinctrl-names = "default", "wakeup"; + pinctrl-0 = <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_default>; + pinctrl-1 = <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_wakeup>; + wakeup-source = <&system_partial_io>, + <&system_deep_sleep>, + <&system_mcu_only>, + <&system_standby>; + status = "okay"; +}; + +&mcu_mcan1 { + pinctrl-names = "default", "wakeup"; + pinctrl-0 = <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_default>; + pinctrl-1 = <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_wakeup>; + wakeup-source = <&system_partial_io>, + <&system_deep_sleep>, + <&system_mcu_only>, + <&system_standby>; + status = "okay"; +}; + +&mcu_pmx0 { + mcu_mcan0_tx_pins_default: mcu-mcan0-tx-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ + >; + }; + + mcu_mcan0_rx_pins_default: mcu-mcan0-rx-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ + >; + }; + + mcu_mcan0_rx_pins_wakeup: mcu-mcan0-rx-wakeup-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x038, PIN_INPUT | PIN_WKUP_EN, 0) /* (B3) MCU_MCAN0_RX */ + >; + }; + + mcu_mcan1_tx_pins_default: mcu-mcan1-tx-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x03c, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX */ + >; + }; + + mcu_mcan1_rx_pins_default: mcu-mcan1-rx-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX */ + >; + }; + + mcu_mcan1_rx_pins_wakeup: mcu-mcan1-rx-wakeup-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x040, PIN_INPUT | PIN_WKUP_EN, 0) /* (D4) MCU_MCAN1_RX */ + >; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index 40fb3c9e674c..c5ee263d34a6 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -76,6 +76,11 @@ assigned-clock-parents = <&k3_clks 157 18>; #clock-cells = <0>; }; + + dss_oldi_io_ctrl: oldi-io-controller@8600 { + compatible = "ti,am625-dss-oldi-io-ctrl", "syscon"; + reg = <0x8600 0x200>; + }; }; dmss: bus@48000000 { @@ -209,6 +214,16 @@ dmas = <&main_pktdma 0xf501 0>, <&main_pktdma 0x7506 0>, <&main_pktdma 0x7507 0>; dma-names = "tx", "rx1", "rx2"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>; + + rng: rng@40910000 { + compatible = "inside-secure,safexcel-eip76"; + reg = <0x00 0x40910000 0x00 0x7d>; + interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; + status = "reserved"; /* Reserved for OP-TEE */ + }; }; secure_proxy_sa3: mailbox@43600000 { @@ -723,6 +738,8 @@ dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "rx"; + status = "disabled"; + ethernet-ports { #address-cells = <1>; #size-cells = <0>; @@ -788,6 +805,53 @@ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; + oldi-transmitters { + #address-cells = <1>; + #size-cells = <0>; + + oldi0: oldi@0 { + reg = <0>; + clocks = <&k3_clks 186 0>; + clock-names = "serial"; + ti,oldi-io-ctrl = <&dss_oldi_io_ctrl>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + oldi0_port0: port@0 { + reg = <0>; + }; + + oldi0_port1: port@1 { + reg = <1>; + }; + }; + }; + + oldi1: oldi@1 { + reg = <1>; + clocks = <&k3_clks 186 0>; + clock-names = "serial"; + ti,oldi-io-ctrl = <&dss_oldi_io_ctrl>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + oldi1_port0: port@0 { + reg = <0>; + }; + + oldi1_port1: port@1 { + reg = <1>; + }; + }; + }; + }; + dss_ports: ports { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi index eeca643fedbe..878d267bc663 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi @@ -211,10 +211,11 @@ &cpsw3g { pinctrl-names = "default"; pinctrl-0 = <&main_rgmii1_pins_default>; + status = "okay"; }; &cpsw_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&cpsw3g_phy1>; bootph-all; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi index 5c1284b802ad..3d1406acf680 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi @@ -74,7 +74,7 @@ /* Verdin ETH_2_RGMII */ &cpsw_port2 { phy-handle = <&cpsw3g_phy1>; - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; status = "okay"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-ivy.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-ivy.dtsi index 71c29eab0eee..844f59f772e1 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin-ivy.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin-ivy.dtsi @@ -268,7 +268,7 @@ /* Verdin ETH_2_RGMII */ &cpsw_port2 { phy-handle = <&cpsw3g_phy1>; - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; status = "okay"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi index dc4b228a9fd7..2a7242a2fef8 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi @@ -845,7 +845,7 @@ /* Verdin ETH_1 (On-module PHY) */ &cpsw_port1 { phy-handle = <&cpsw3g_phy0>; - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62.dtsi b/arch/arm64/boot/dts/ti/k3-am62.dtsi index 59f6dff552ed..b08b7062060c 100644 --- a/arch/arm64/boot/dts/ti/k3-am62.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62.dtsi @@ -46,6 +46,28 @@ interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; }; + system-idle-states { + system_partial_io: system-partial-io { + compatible = "system-idle-state"; + idle-state-name = "off-wake"; + }; + + system_deep_sleep: system-deep-sleep { + compatible = "system-idle-state"; + idle-state-name = "mem"; + }; + + system_mcu_only: system-mcu-only { + compatible = "system-idle-state"; + idle-state-name = "mem-mcu-active"; + }; + + system_standby: system-standby { + compatible = "system-idle-state"; + idle-state-name = "standby"; + }; + }; + cbass_main: bus@f0000 { bootph-all; compatible = "simple-bus"; diff --git a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts index 7028d9835c4a..c468b9c5fc09 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts @@ -590,10 +590,11 @@ <&gbe_pmx_obsclk>; assigned-clocks = <&k3_clks 157 70>, <&k3_clks 157 20>; assigned-clock-parents = <&k3_clks 157 72>, <&k3_clks 157 22>; + status = "okay"; }; &cpsw_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&cpsw3g_phy0>; }; diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk-common.dtsi b/arch/arm64/boot/dts/ti/k3-am625-sk-common.dtsi index fe0b98e1d105..9c8362682645 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-sk-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am625-sk-common.dtsi @@ -212,11 +212,11 @@ &cpsw3g { pinctrl-names = "default"; pinctrl-0 = <&main_rgmii1_pins_default>, <&main_rgmii2_pins_default>; + status = "okay"; }; &cpsw_port2 { - /* PCB provides an internal delay of 2ns */ - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&cpsw3g_phy1>; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index 829f00adea6e..9e5b75a4e88e 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -247,6 +247,16 @@ dmas = <&main_pktdma 0xf501 0>, <&main_pktdma 0x7506 0>, <&main_pktdma 0x7507 0>; dma-names = "tx", "rx1", "rx2"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>; + + rng: rng@40910000 { + compatible = "inside-secure,safexcel-eip76"; + reg = <0x00 0x40910000 0x00 0x7d>; + interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; + status = "reserved"; /* Reserved for OP-TEE */ + }; }; secure_proxy_sa3: mailbox@43600000 { diff --git a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi index b3d012a5a26a..b24a63feeab8 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi @@ -192,7 +192,7 @@ }; &cpsw_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&cpsw3g_phy1>; bootph-all; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62a.dtsi b/arch/arm64/boot/dts/ti/k3-am62a.dtsi index 4d79b3e9486a..31b2de035f0f 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a.dtsi @@ -46,6 +46,33 @@ interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; }; + system-idle-states { + system_partial_io: system-partial-io { + compatible = "system-idle-state"; + idle-state-name = "off-wake"; + }; + + system_io_ddr: system-io-ddr { + compatible = "system-idle-state"; + idle-state-name = "mem-deep"; + }; + + system_deep_sleep: system-deep-sleep { + compatible = "system-idle-state"; + idle-state-name = "mem"; + }; + + system_mcu_only: system-mcu-only { + compatible = "system-idle-state"; + idle-state-name = "mem-mcu-active"; + }; + + system_standby: system-standby { + compatible = "system-idle-state"; + idle-state-name = "standby"; + }; + }; + cbass_main: bus@f0000 { compatible = "simple-bus"; #address-cells = <2>; diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts index af591fe6ae4f..e99bdbc2e0cb 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -233,6 +233,10 @@ &wkup_uart0 { pinctrl-names = "default"; pinctrl-0 = <&wkup_uart0_pins_default>; + wakeup-source = <&system_io_ddr>, + <&system_deep_sleep>, + <&system_mcu_only>, + <&system_standby>; status = "reserved"; }; @@ -426,6 +430,42 @@ AM62AX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */ >; }; + + mcu_mcan0_tx_pins_default: mcu-mcan0-tx-default-pins { + pinctrl-single,pins = < + AM62AX_MCU_IOPAD(0x034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ + >; + }; + + mcu_mcan0_rx_pins_default: mcu-mcan0-rx-default-pins { + pinctrl-single,pins = < + AM62AX_MCU_IOPAD(0x038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ + >; + }; + + mcu_mcan0_rx_pins_wakeup: mcu-mcan0-rx-wakeup-pins { + pinctrl-single,pins = < + AM62AX_MCU_IOPAD(0x038, PIN_INPUT | PIN_WKUP_EN, 0) /* (B3) MCU_MCAN0_RX */ + >; + }; + + mcu_mcan1_tx_pins_default: mcu-mcan1-tx-default-pins { + pinctrl-single,pins = < + AM62AX_MCU_IOPAD(0x03c, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX */ + >; + }; + + mcu_mcan1_rx_pins_default: mcu-mcan1-rx-default-pins { + pinctrl-single,pins = < + AM62AX_MCU_IOPAD(0x040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX */ + >; + }; + + mcu_mcan1_rx_pins_wakeup: mcu-mcan1-rx-wakeup-pins { + pinctrl-single,pins = < + AM62AX_MCU_IOPAD(0x040, PIN_INPUT | PIN_WKUP_EN, 0) /* (D4) MCU_MCAN1_RX */ + >; + }; }; &mcu_gpio0 { @@ -731,7 +771,7 @@ &cpsw_port1 { status = "okay"; - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&cpsw3g_phy0>; bootph-all; }; @@ -852,4 +892,33 @@ }; }; +&mcu_mcan0 { + pinctrl-names = "default", "wakeup"; + pinctrl-0 = <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_default>; + pinctrl-1 = <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_wakeup>; + wakeup-source = <&system_partial_io>, + <&system_io_ddr>, + <&system_deep_sleep>, + <&system_mcu_only>, + <&system_standby>; +}; + +&mcu_mcan1 { + pinctrl-names = "default", "wakeup"; + pinctrl-0 = <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_default>; + pinctrl-1 = <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_wakeup>; + wakeup-source = <&system_partial_io>, + <&system_io_ddr>, + <&system_deep_sleep>, + <&system_mcu_only>, + <&system_standby>; +}; + +&mcu_uart0 { + wakeup-source = <&system_io_ddr>, + <&system_deep_sleep>, + <&system_mcu_only>, + <&system_standby>; +}; + #include "k3-am62a-ti-ipc-firmware.dtsi" diff --git a/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts b/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts index 83af889e790a..2b233bc0323d 100644 --- a/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts @@ -146,6 +146,7 @@ regulator-name = "vdd_mmc1"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_3v3_sys>; regulator-boot-on; enable-active-high; gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; @@ -165,14 +166,16 @@ }; vddshv_sdio: regulator-6 { + /* output of TLV7103318QDSERQ1 */ compatible = "regulator-gpio"; regulator-name = "vddshv_sdio"; pinctrl-names = "default"; pinctrl-0 = <&vddshv_sdio_pins_default>; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_5v0>; regulator-boot-on; - gpios = <&main_gpio1 31 GPIO_ACTIVE_HIGH>; + gpios = <&main_gpio0 59 GPIO_ACTIVE_HIGH>; states = <1800000 0x0>, <3300000 0x1>; bootph-all; @@ -198,7 +201,7 @@ pmic_irq_pins_default: pmic-irq-default-pins { pinctrl-single,pins = < - AM62DX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */ + AM62DX_IOPAD(0x01f4, PIN_INPUT, 7) /* (F17) EXTINTn.GPIO1_31 */ >; }; @@ -211,6 +214,14 @@ >; bootph-all; }; + + wkup_i2c0_pins_default: wkup-i2c0-default-pins { + pinctrl-single,pins = < + AM62DX_MCU_IOPAD(0x004c, PIN_INPUT, 0) /* (D13) WKUP_I2C0_SCL */ + AM62DX_MCU_IOPAD(0x0050, PIN_INPUT, 0) /* (E13) WKUP_I2C0_SDA */ + >; + bootph-all; + }; }; /* WKUP UART0 is used for DM firmware logs */ @@ -334,7 +345,7 @@ vddshv_sdio_pins_default: vddshv-sdio-default-pins { pinctrl-single,pins = < - AM62DX_IOPAD(0x1f4, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO1_31 */ + AM62DX_IOPAD(0x00f0, PIN_INPUT, 7) /* (Y21) GPIO0_59 */ >; bootph-all; }; @@ -355,9 +366,6 @@ pinctrl-single,pins = < AM62DX_IOPAD(0x0000, PIN_OUTPUT, 0) /* (L22) OSPI0_CLK */ AM62DX_IOPAD(0x002c, PIN_OUTPUT, 0) /* (H21) OSPI0_CSn0 */ - AM62DX_IOPAD(0x0030, PIN_OUTPUT, 0) /* (G19) OSPI0_CSn1 */ - AM62DX_IOPAD(0x0034, PIN_OUTPUT, 0) /* (K20) OSPI0_CSn2 */ - AM62DX_IOPAD(0x0038, PIN_OUTPUT, 0) /* (G20) OSPI0_CSn3 */ AM62DX_IOPAD(0x000c, PIN_INPUT, 0) /* (J21) OSPI0_D0 */ AM62DX_IOPAD(0x0010, PIN_INPUT, 0) /* (J18) OSPI0_D1 */ AM62DX_IOPAD(0x0014, PIN_INPUT, 0) /* (J19) OSPI0_D2 */ @@ -461,6 +469,89 @@ status = "okay"; }; +&wkup_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&wkup_i2c0_pins_default>; + clock-frequency = <400000>; + status = "okay"; + + tps65224: pmic@48 { + compatible = "ti,tps65224-q1"; + reg = <0x48>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_irq_pins_default>; + interrupt-parent = <&main_gpio1>; + interrupts = <31 IRQ_TYPE_EDGE_FALLING>; + ti,primary-pmic; + + gpio-controller; + #gpio-cells = <2>; + + buck12-supply = <&vcc_3v3_sys>; + buck3-supply = <&vcc_3v3_sys>; + buck4-supply = <&vcc_3v3_sys>; + ldo1-supply = <&vcc_3v3_sys>; + ldo2-supply = <&vcc_3v3_sys>; + ldo3-supply = <&vcc_3v3_sys>; + + regulators { + buck12: buck12 { + regulator-name = "vdd_core"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + bootph-all; + }; + + buck3: buck3 { + regulator-name = "dvdd1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + bootph-all; + }; + + buck4: buck4 { + regulator-name = "vdds_ddr"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-boot-on; + regulator-always-on; + bootph-all; + }; + + ldo1: ldo1 { + regulator-name = "vdda_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + bootph-all; + }; + + ldo2: ldo2 { + regulator-name = "dvdd3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + bootph-all; + }; + + ldo3: ldo3 { + regulator-name = "vddr_core"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + bootph-all; + }; + }; + }; +}; + &sdhci0 { /* eMMC */ non-removable; diff --git a/arch/arm64/boot/dts/ti/k3-am62l-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62l-main.dtsi new file mode 100644 index 000000000000..883beb76ba9c --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62l-main.dtsi @@ -0,0 +1,580 @@ +// SPDX-License-Identifier: GPL-2.0-only or MIT +/* + * Device Tree file for the AM62L main domain peripherals + * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ + * + * Technical Reference Manual: https://www.ti.com/lit/pdf/sprujb4 + */ + +&cbass_main { + gic500: interrupt-controller@1800000 { + compatible = "arm,gic-v3"; + reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */ + <0x00 0x01840000 0x00 0xc0000>, /* GICR */ + <0x01 0x00000000 0x00 0x2000>, /* GICC */ + <0x01 0x00010000 0x00 0x1000>, /* GICH */ + <0x01 0x00020000 0x00 0x2000>; /* GICV */ + ranges; + #address-cells = <2>; + #size-cells = <2>; + #interrupt-cells = <3>; + interrupt-controller; + /* + * vcpumntirq: + * virtual CPU interface maintenance interrupt + */ + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; + + gic_its: msi-controller@1820000 { + compatible = "arm,gic-v3-its"; + reg = <0x00 0x01820000 0x00 0x10000>; + socionext,synquacer-pre-its = <0x1000000 0x400000>; + msi-controller; + #msi-cells = <1>; + }; + }; + + gpio0: gpio@600000 { + compatible = "ti,am64-gpio", "ti,keystone-gpio"; + reg = <0x00 0x00600000 0x00 0x100>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&gic500>; + interrupts = <GIC_SPI 260 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 261 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 262 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 263 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 265 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 266 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 267 IRQ_TYPE_EDGE_RISING>; + interrupt-controller; + #interrupt-cells = <2>; + power-domains = <&scmi_pds 34>; + clocks = <&scmi_clk 140>; + clock-names = "gpio"; + ti,ngpio = <126>; + ti,davinci-gpio-unbanked = <0>; + }; + + gpio2: gpio@610000 { + compatible = "ti,am64-gpio", "ti,keystone-gpio"; + reg = <0x00 0x00610000 0x00 0x100>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&gic500>; + interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 281 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 282 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 284 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 285 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 287 IRQ_TYPE_EDGE_RISING>; + interrupt-controller; + #interrupt-cells = <2>; + power-domains = <&scmi_pds 35>; + clocks = <&scmi_clk 141>; + clock-names = "gpio"; + ti,ngpio = <79>; + ti,davinci-gpio-unbanked = <0>; + }; + + timer0: timer@2400000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x2400000 0x00 0x400>; + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&scmi_clk 58>; + clock-names = "fck"; + power-domains = <&scmi_pds 15>; + ti,timer-pwm; + }; + + timer1: timer@2410000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x2410000 0x00 0x400>; + interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&scmi_clk 63>; + clock-names = "fck"; + power-domains = <&scmi_pds 16>; + ti,timer-pwm; + }; + + timer2: timer@2420000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x2420000 0x00 0x400>; + interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&scmi_clk 77>; + clock-names = "fck"; + power-domains = <&scmi_pds 17>; + ti,timer-pwm; + }; + + timer3: timer@2430000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x2430000 0x00 0x400>; + interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&scmi_clk 82>; + clock-names = "fck"; + power-domains = <&scmi_pds 18>; + ti,timer-pwm; + }; + + uart0: serial@2800000 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x02800000 0x00 0x100>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&scmi_pds 89>; + clocks = <&scmi_clk 358>; + clock-names = "fclk"; + status = "disabled"; + }; + + uart1: serial@2810000 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x02810000 0x00 0x100>; + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&scmi_pds 77>; + clocks = <&scmi_clk 312>; + clock-names = "fclk"; + status = "disabled"; + }; + + uart2: serial@2820000 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x02820000 0x00 0x100>; + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&scmi_pds 78>; + clocks = <&scmi_clk 314>; + clock-names = "fclk"; + status = "disabled"; + }; + + uart3: serial@2830000 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x02830000 0x00 0x100>; + interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&scmi_pds 79>; + clocks = <&scmi_clk 316>; + clock-names = "fclk"; + status = "disabled"; + }; + + uart4: serial@2840000 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x02840000 0x00 0x100>; + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&scmi_pds 80>; + clocks = <&scmi_clk 318>; + clock-names = "fclk"; + status = "disabled"; + }; + + uart5: serial@2850000 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x02850000 0x00 0x100>; + interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&scmi_pds 81>; + clocks = <&scmi_clk 320>; + clock-names = "fclk"; + status = "disabled"; + }; + + uart6: serial@2860000 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x02860000 0x00 0x100>; + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&scmi_pds 82>; + clocks = <&scmi_clk 322>; + clock-names = "fclk"; + status = "disabled"; + }; + + conf: bus@9000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00 0x00 0x09000000 0x380000>; + + phy_gmii_sel: phy@1be000 { + compatible = "ti,am654-phy-gmii-sel"; + reg = <0x1be000 0x8>; + #phy-cells = <1>; + }; + + epwm_tbclk: clock-controller@1e9100 { + compatible = "ti,am62-epwm-tbclk"; + reg = <0x1e9100 0x4>; + #clock-cells = <1>; + }; + }; + + usbss0: dwc3-usb@f900000 { + compatible = "ti,am62-usb"; + reg = <0x00 0x0f900000 0x00 0x800>, + <0x00 0x0f908000 0x00 0x400>; + clocks = <&scmi_clk 331>; + clock-names = "ref"; + ti,syscon-phy-pll-refclk = <&usb_phy_ctrl 0x0>; + #address-cells = <2>; + #size-cells = <2>; + power-domains = <&scmi_pds 95>; + ranges; + status = "disabled"; + + usb0: usb@31000000 { + compatible = "snps,dwc3"; + reg = <0x00 0x31000000 0x00 0x50000>; + interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */ + <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */ + interrupt-names = "host", "peripheral"; + maximum-speed = "high-speed"; + dr_mode = "otg"; + snps,usb2-gadget-lpm-disable; + snps,usb2-lpm-disable; + }; + }; + + usbss1: dwc3-usb@f910000 { + compatible = "ti,am62-usb"; + reg = <0x00 0x0f910000 0x00 0x800>, + <0x00 0x0f918000 0x00 0x400>; + clocks = <&scmi_clk 338>; + clock-names = "ref"; + ti,syscon-phy-pll-refclk = <&usb_phy_ctrl 0x4>; + #address-cells = <2>; + #size-cells = <2>; + power-domains = <&scmi_pds 96>; + ranges; + status = "disabled"; + + usb1: usb@31100000 { + compatible = "snps,dwc3"; + reg = <0x00 0x31100000 0x00 0x50000>; + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */ + <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */ + interrupt-names = "host", "peripheral"; + maximum-speed = "high-speed"; + dr_mode = "otg"; + snps,usb2-gadget-lpm-disable; + snps,usb2-lpm-disable; + }; + }; + + sdhci1: mmc@fa00000 { + compatible = "ti,j721e-sdhci-4bit"; + reg = <0x00 0x0fa00000 0x00 0x1000>, + <0x00 0x0fa08000 0x00 0x400>; + interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&scmi_pds 26>; + clocks = <&scmi_clk 106>, <&scmi_clk 109>; + clock-names = "clk_ahb", "clk_xin"; + assigned-clocks = <&scmi_clk 109>; + bus-width = <4>; + ti,clkbuf-sel = <0x7>; + ti,otap-del-sel-legacy = <0x0>; + ti,itap-del-sel-legacy = <0x0>; + status = "disabled"; + }; + + sdhci0: mmc@fa10000 { + compatible = "ti,am62-sdhci"; + reg = <0x00 0xfa10000 0x00 0x1000>, + <0x00 0xfa18000 0x00 0x400>; + interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&scmi_pds 28>; + clocks = <&scmi_clk 122>, <&scmi_clk 125>; + clock-names = "clk_ahb", "clk_xin"; + assigned-clocks = <&scmi_clk 125>; + bus-width = <8>; + ti,clkbuf-sel = <0x7>; + ti,otap-del-sel-legacy = <0x0>; + ti,otap-del-sel-mmc-hs = <0x0>; + ti,otap-del-sel-hs200 = <0x6>; + status = "disabled"; + }; + + sdhci2: mmc@fa20000 { + compatible = "ti,am62-sdhci"; + reg = <0x00 0x0fa20000 0x00 0x1000>, + <0x00 0x0fa28000 0x00 0x400>; + interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&scmi_pds 27>; + clocks = <&scmi_clk 114>, <&scmi_clk 117>; + clock-names = "clk_ahb", "clk_xin"; + assigned-clocks = <&scmi_clk 117>; + bus-width = <4>; + ti,clkbuf-sel = <0x7>; + ti,otap-del-sel-legacy = <0x0>; + ti,itap-del-sel-legacy = <0x0>; + status = "disabled"; + }; + + i2c0: i2c@20000000 { + compatible = "ti,am64-i2c", "ti,omap4-i2c"; + reg = <0x00 0x20000000 0x00 0x100>; + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&scmi_pds 53>; + clocks = <&scmi_clk 246>; + clock-names = "fck"; + status = "disabled"; + }; + + i2c1: i2c@20010000 { + compatible = "ti,am64-i2c", "ti,omap4-i2c"; + reg = <0x00 0x20010000 0x00 0x100>; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&scmi_pds 54>; + clocks = <&scmi_clk 250>; + clock-names = "fck"; + status = "disabled"; + }; + + i2c2: i2c@20020000 { + compatible = "ti,am64-i2c", "ti,omap4-i2c"; + reg = <0x00 0x20020000 0x00 0x100>; + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&scmi_pds 55>; + clocks = <&scmi_clk 254>; + clock-names = "fck"; + status = "disabled"; + }; + + i2c3: i2c@20030000 { + compatible = "ti,am64-i2c", "ti,omap4-i2c"; + reg = <0x00 0x20030000 0x00 0x100>; + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&scmi_pds 56>; + clocks = <&scmi_clk 258>; + clock-names = "fck"; + status = "disabled"; + }; + + mcan0: can@20701000 { + compatible = "bosch,m_can"; + reg = <0x00 0x20701000 0x00 0x200>, + <0x00 0x20708000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&scmi_pds 47>; + clocks = <&scmi_clk 179>, <&scmi_clk 178>; + clock-names = "hclk", "cclk"; + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + mcan1: can@20711000 { + compatible = "bosch,m_can"; + reg = <0x00 0x20711000 0x00 0x200>, + <0x00 0x20718000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&scmi_pds 48>; + clocks = <&scmi_clk 185>, <&scmi_clk 184>; + clock-names = "hclk", "cclk"; + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + mcan2: can@20721000 { + compatible = "bosch,m_can"; + reg = <0x00 0x20721000 0x00 0x200>, + <0x00 0x20728000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&scmi_pds 49>; + clocks = <&scmi_clk 191>, <&scmi_clk 190>; + clock-names = "hclk", "cclk"; + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + spi0: spi@20100000 { + compatible = "ti,am654-mcspi", "ti,omap4-mcspi"; + reg = <0x00 0x20100000 0x00 0x400>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&scmi_pds 72>; + clocks = <&scmi_clk 299>; + status = "disabled"; + }; + + spi1: spi@20110000 { + compatible = "ti,am654-mcspi","ti,omap4-mcspi"; + reg = <0x00 0x20110000 0x00 0x400>; + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&scmi_pds 73>; + clocks = <&scmi_clk 302>; + status = "disabled"; + }; + + spi2: spi@20120000 { + compatible = "ti,am654-mcspi","ti,omap4-mcspi"; + reg = <0x00 0x20120000 0x00 0x400>; + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&scmi_pds 74>; + clocks = <&scmi_clk 305>; + status = "disabled"; + }; + + spi3: spi@20130000 { + compatible = "ti,am654-mcspi","ti,omap4-mcspi"; + reg = <0x00 0x20130000 0x00 0x400>; + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&scmi_pds 75>; + clocks = <&scmi_clk 308>; + status = "disabled"; + }; + + epwm0: pwm@23000000 { + compatible = "ti,am64-epwm", "ti,am3352-ehrpwm"; + reg = <0x00 0x23000000 0x00 0x100>; + power-domains = <&scmi_pds 40>; + clocks = <&epwm_tbclk 0>, <&scmi_clk 164>; + clock-names = "tbclk", "fck"; + #pwm-cells = <3>; + status = "disabled"; + }; + + epwm1: pwm@23010000 { + compatible = "ti,am64-epwm", "ti,am3352-ehrpwm"; + reg = <0x00 0x23010000 0x00 0x100>; + power-domains = <&scmi_pds 41>; + clocks = <&epwm_tbclk 1>, <&scmi_clk 165>; + clock-names = "tbclk", "fck"; + #pwm-cells = <3>; + status = "disabled"; + }; + + epwm2: pwm@23020000 { + compatible = "ti,am64-epwm", "ti,am3352-ehrpwm"; + reg = <0x00 0x23020000 0x00 0x100>; + power-domains = <&scmi_pds 42>; + clocks = <&epwm_tbclk 2>, <&scmi_clk 166>; + clock-names = "tbclk", "fck"; + #pwm-cells = <3>; + status = "disabled"; + }; + + ecap0: pwm@23100000 { + compatible = "ti,am3352-ecap"; + reg = <0x00 0x23100000 0x00 0x100>; + power-domains = <&scmi_pds 23>; + clocks = <&scmi_clk 99>; + clock-names = "fck"; + #pwm-cells = <3>; + status = "disabled"; + }; + + ecap1: pwm@23110000 { + compatible = "ti,am3352-ecap"; + reg = <0x00 0x23110000 0x00 0x100>; + power-domains = <&scmi_pds 24>; + clocks = <&scmi_clk 100>; + clock-names = "fck"; + #pwm-cells = <3>; + status = "disabled"; + }; + + ecap2: pwm@23120000 { + compatible = "ti,am3352-ecap"; + reg = <0x00 0x23120000 0x00 0x100>; + power-domains = <&scmi_pds 25>; + clocks = <&scmi_clk 101>; + clock-names = "fck"; + #pwm-cells = <3>; + status = "disabled"; + }; + + eqep0: counter@23200000 { + compatible = "ti,am62-eqep"; + reg = <0x00 0x23200000 0x00 0x100>; + power-domains = <&scmi_pds 29>; + clocks = <&scmi_clk 127>; + interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>; + status = "disabled"; + }; + + eqep1: counter@23210000 { + compatible = "ti,am62-eqep"; + reg = <0x00 0x23210000 0x00 0x100>; + power-domains = <&scmi_pds 30>; + clocks = <&scmi_clk 128>; + interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>; + status = "disabled"; + }; + + eqep2: counter@23220000 { + compatible = "ti,am62-eqep"; + reg = <0x00 0x23220000 0x00 0x100>; + power-domains = <&scmi_pds 31>; + clocks = <&scmi_clk 129>; + interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>; + status = "disabled"; + }; + + elm0: ecc@25010000 { + compatible = "ti,am64-elm"; + reg = <0x00 0x25010000 0x00 0x2000>; + interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&scmi_pds 25>; + clocks = <&scmi_clk 102>; + clock-names = "fck"; + status = "disabled"; + }; + + gpmc0: memory-controller@3b000000 { + compatible = "ti,am64-gpmc"; + power-domains = <&scmi_pds 37>; + clocks = <&scmi_clk 149>; + clock-names = "fck"; + reg = <0x00 0x3b000000 0x00 0x400>, + <0x00 0x50000000 0x00 0x8000000>; + reg-names = "cfg", "data"; + interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; + gpmc,num-cs = <3>; + gpmc,num-waitpins = <2>; + #address-cells = <2>; + #size-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + status = "disabled"; + }; + + oc_sram: sram@70800000 { + compatible = "mmio-sram"; + reg = <0x00 0x70800000 0x00 0x10000>; + ranges = <0x00 0x00 0x70800000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + + scmi_shmem: sram@0 { + compatible = "arm,scmi-shmem"; + reg = <0x00 0x100>; + bootph-all; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am62l-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62l-wakeup.dtsi new file mode 100644 index 000000000000..61bfcdcfc66e --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62l-wakeup.dtsi @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: GPL-2.0-only or MIT +/* + * Device Tree file for the AM62L wakeup domain peripherals + * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ + * + * Technical Reference Manual: https://www.ti.com/lit/pdf/sprujb4 + */ + +#include <dt-bindings/bus/ti-sysc.h> + +&cbass_wakeup { + vtm0: temperature-sensor@b00000 { + compatible = "ti,j7200-vtm"; + reg = <0x00 0xb00000 0x00 0x400>, + <0x00 0xb01000 0x00 0x400>; + power-domains = <&scmi_pds 46>; + #thermal-sensor-cells = <1>; + }; + + pmx0: pinctrl@4084000 { + compatible = "ti,am62l-padconf", "pinctrl-single"; + reg = <0x00 0x4084000 0x00 0x24c>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xffffffff>; + #pinctrl-cells = <1>; + }; + + wkup_gpio0: gpio@4201000 { + compatible = "ti,am64-gpio", "ti,keystone-gpio"; + reg = <0x00 0x04201000 0x00 0x100>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&gic500>; + interrupts = <GIC_SPI 276 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 704 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 705 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 706 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 707 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 708 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 709 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 710 IRQ_TYPE_EDGE_RISING>; + interrupt-controller; + #interrupt-cells = <2>; + power-domains = <&scmi_pds 36>; + clocks = <&scmi_clk 146>; + clock-names = "gpio"; + ti,ngpio = <7>; + ti,davinci-gpio-unbanked = <0>; + status = "disabled"; + }; + + wkup_timer0: timer@2b100000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x2b100000 0x00 0x400>; + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&scmi_clk 93>; + clock-names = "fck"; + power-domains = <&scmi_pds 19>; + ti,timer-pwm; + }; + + wkup_timer1: timer@2b110000 { + compatible = "ti,am654-timer"; + reg = <0x00 0x2b110000 0x00 0x400>; + interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&scmi_clk 98>; + clock-names = "fck"; + power-domains = <&scmi_pds 20>; + ti,timer-pwm; + }; + + wkup_i2c0: i2c@2b200000 { + compatible = "ti,am64-i2c", "ti,omap4-i2c"; + reg = <0x00 0x2b200000 0x00 0x100>; + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&scmi_pds 57>; + clocks = <&scmi_clk 262>; + clock-names = "fck"; + status = "disabled"; + }; + + target-module@2b300050 { + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x00 0x2b300050 0x00 0x4>, + <0x00 0x2b300054 0x00 0x4>, + <0x00 0x2b300058 0x00 0x4>; + reg-names = "rev", "sysc", "syss"; + ranges = <0x00 0x00 0x2b300000 0x100000>; + #address-cells = <1>; + #size-cells = <1>; + power-domains = <&scmi_pds 83>; + clocks = <&scmi_clk 324>; + clock-names = "fck"; + ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | + SYSC_OMAP2_SOFTRESET | + SYSC_OMAP2_AUTOIDLE)>; + ti,sysc-sidle = <SYSC_IDLE_FORCE>, + <SYSC_IDLE_NO>, + <SYSC_IDLE_SMART>, + <SYSC_IDLE_SMART_WKUP>; + ti,syss-mask = <1>; + ti,no-reset-on-init; + status = "disabled"; + + wkup_uart0: serial@0 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x100>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&scmi_clk 324>; + assigned-clocks = <&scmi_clk 324>; + clock-names = "fclk"; + status = "disabled"; + }; + }; + + wkup_conf: bus@43000000 { + compatible = "simple-bus"; + ranges = <0x00 0x00 0x43000000 0x80000>; + #address-cells = <1>; + #size-cells = <1>; + + chipid: chipid@14 { + compatible = "ti,am654-chipid"; + reg = <0x14 0x4>; + bootph-all; + }; + + cpsw_mac_syscon: ethernet-mac-syscon@2000 { + compatible = "ti,am62p-cpsw-mac-efuse", "syscon"; + reg = <0x2000 0x8>; + }; + + usb_phy_ctrl: syscon@45000 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x45000 0x1000>; + bootph-all; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am62l.dtsi b/arch/arm64/boot/dts/ti/k3-am62l.dtsi new file mode 100644 index 000000000000..23acdbb301fe --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62l.dtsi @@ -0,0 +1,118 @@ +// SPDX-License-Identifier: GPL-2.0-only or MIT +/* + * Device Tree Source for AM62L SoC Family + * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ + * + * Technical Reference Manual: https://www.ti.com/lit/pdf/sprujb4 + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +#include "k3-pinctrl.h" + +/ { + model = "Texas Instruments K3 AM62L3 SoC"; + compatible = "ti,am62l3"; + interrupt-parent = <&gic500>; + #address-cells = <2>; + #size-cells = <2>; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + + psci: psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + scmi: scmi { + compatible = "arm,scmi-smc"; + arm,smc-id = <0x82004000>; + shmem = <&scmi_shmem>; + #address-cells = <1>; + #size-cells = <0>; + + scmi_clk: protocol@14 { + reg = <0x14>; + #clock-cells = <1>; + bootph-all; + }; + + scmi_pds: protocol@11 { + reg = <0x11>; + #power-domain-cells = <1>; + bootph-all; + }; + }; + }; + + a53_timer0: timer-cl0-cpu0 { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, /* cntpsirq */ + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, /* cntpnsirq */ + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, /* cntvirq */ + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; /* cnthpirq */ + }; + + pmu: pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; + }; + + cbass_main: bus@f0000 { + compatible = "simple-bus"; + ranges = <0x00 0x00600000 0x00 0x00600000 0x00 0x00010100>, /* GPIO */ + <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First Peripheral Window */ + <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000400>, /* Timesync Router */ + <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* CPSW */ + <0x00 0x09000000 0x00 0x09000000 0x00 0x00400000>, /* CTRL MMRs */ + <0x00 0x0e000000 0x00 0x0e000000 0x00 0x1a001400>, /* Second Peripheral Window */ + <0x00 0x301c0000 0x00 0x301c0000 0x00 0x00001000>, /* DPHY-TX */ + <0x00 0x30200000 0x00 0x30200000 0x00 0x0000b000>, /* DSS */ + <0x00 0x30270000 0x00 0x30270000 0x00 0x00390000>, /* DSI Wrapper */ + <0x00 0x30500000 0x00 0x30500000 0x00 0x00100000>, /* DSI Config */ + <0x00 0x31000000 0x00 0x31000000 0x00 0x00050000>, /* USB0 DWC3 Core Window */ + <0x00 0x31100000 0x00 0x31100000 0x00 0x00050000>, /* USB1 DWC3 Core Window */ + <0x00 0x3b000000 0x00 0x3b000000 0x00 0x00000400>, /* GPMC0 */ + <0x00 0x45810000 0x00 0x45810000 0x00 0x03170000>, /* DMSS */ + <0x00 0x50000000 0x00 0x50000000 0x00 0x08000000>, /* GPMC DATA */ + <0x00 0x60000000 0x00 0x60000000 0x00 0x08000000>, /* FSS DAT1 */ + <0x00 0x70800000 0x00 0x70800000 0x00 0x00018000>, /* OCSRAM */ + <0x01 0x00000000 0x01 0x00000000 0x00 0x00310000>, /* A53 PERIPHBASE */ + <0x04 0x00000000 0x04 0x00000000 0x01 0x00000000>, /* FSS DAT0 */ + <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, /* FSS DAT3 */ + + /* Wakeup Domain Range */ + <0x00 0x00a80000 0x00 0x00a80000 0x00 0x00034000>, /* GTC */ + <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00001400>, /* VTM */ + <0x00 0x04080000 0x00 0x04080000 0x00 0x00008000>, /* PDCFG */ + <0x00 0x04201000 0x00 0x04201000 0x00 0x00000100>, /* GPIO */ + <0x00 0x2b100000 0x00 0x2b100000 0x00 0x00100100>, /* Wakeup Peripheral Window */ + <0x00 0x40800000 0x00 0x40800000 0x00 0x00014000>, /* DMA */ + <0x00 0x43000000 0x00 0x43000000 0x00 0x00080000>; /* CTRL MMRs */ + #address-cells = <2>; + #size-cells = <2>; + + cbass_wakeup: bus@a80000 { + compatible = "simple-bus"; + ranges = <0x00 0x00a80000 0x00 0x00a80000 0x00 0x00034000>, /* GTC */ + <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00001400>, /* VTM */ + <0x00 0x04080000 0x00 0x04080000 0x00 0x00008000>, /* PDCFG */ + <0x00 0x04201000 0x00 0x04201000 0x00 0x00000100>, /* GPIO */ + <0x00 0x2b100000 0x00 0x2b100000 0x00 0x00100100>, /* Wakeup Peripheral Window */ + <0x00 0x40800000 0x00 0x40800000 0x00 0x00014000>, /* DMA */ + <0x00 0x43000000 0x00 0x43000000 0x00 0x00080000>; /* CTRL MMRs */ + #address-cells = <2>; + #size-cells = <2>; + }; + }; +}; + +/* Now include peripherals for each bus segment */ +#include "k3-am62l-main.dtsi" +#include "k3-am62l-wakeup.dtsi" diff --git a/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts b/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts new file mode 100644 index 000000000000..cae04cce3373 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts @@ -0,0 +1,361 @@ +// SPDX-License-Identifier: GPL-2.0-only or MIT +/* + * Device Tree file for the AM62L3 Evaluation Module + * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ + * + * Technical Reference Manual: https://www.ti.com/lit/pdf/sprujb4 + * Data Sheet: https://www.ti.com/lit/pdf/sprspa1 + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/net/ti-dp83867.h> +#include <dt-bindings/thermal/thermal.h> +#include "k3-am62l3.dtsi" +#include "k3-pinctrl.h" + +/ { + compatible = "ti,am62l3-evm", "ti,am62l3"; + model = "Texas Instruments AM62L3 Evaluation Module"; + + chosen { + stdout-path = &uart0; + }; + + memory@80000000 { + reg = <0x00000000 0x80000000 0x00000000 0x80000000>; + device_type = "memory"; + bootph-all; + }; + + gpio_keys: gpio-keys { + compatible = "gpio-keys"; + autorepeat; + pinctrl-names = "default"; + pinctrl-0 = <&usr_button_pins_default>; + + usr: button-usr { + label = "User Key"; + linux,code = <BTN_0>; + gpios = <&gpio0 90 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&usr_led_pins_default>; + + led-0 { + label = "am62-sk:green:heartbeat"; + gpios = <&gpio0 123 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + function = LED_FUNCTION_HEARTBEAT; + default-state = "on"; + }; + }; + + thermal-zones { + wkup0-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 0>; + + trips { + crit0 { + temperature = <125000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; + + vmain_pd: regulator-0 { + /* TPS65988 PD CONTROLLER OUTPUT */ + compatible = "regulator-fixed"; + regulator-name = "vmain_pd"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + bootph-all; + }; + + vcc_3v3_sys: regulator-1 { + /* output of LM61460-Q1 */ + compatible = "regulator-fixed"; + regulator-name = "vcc_3v3_sys"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vmain_pd>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_mmc1: regulator-2 { + /* TPS22918DBVR */ + compatible = "regulator-fixed"; + regulator-name = "vdd_mmc1"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + enable-active-high; + vin-supply = <&vcc_3v3_sys>; + gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; + bootph-all; + }; + + vcc_1v8: regulator-3 { + /* output of TPS6282518DMQ */ + compatible = "regulator-fixed"; + regulator-name = "vcc_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_3v3_sys>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&gpio0 { + bootph-all; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_default>; + clock-frequency = <400000>; + status = "okay"; + + eeprom@51 { + /* AT24C512C-MAHM-T or M24512-DFMC6TG */ + compatible = "atmel,24c512"; + reg = <0x51>; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_default>; + clock-frequency = <100000>; + status = "okay"; + + exp1: gpio@22 { + compatible = "ti,tca6424"; + reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "", "", + "UART1_FET_SEL", "MMC1_SD_EN", + "VPP_LDO_EN", "EXP_PS_3V3_EN", + "UART1_FET_BUF_EN", "", "", + "", "DSI_GPIO0", "DSI_GPIO1", + "", "BT_UART_WAKE_SOC_3V3", + "USB_TYPEA_OC_INDICATION", "", + "", "WLAN_ALERTn", "", "", + "HDMI_INTn", "TEST_GPIO2", + "MCASP0_FET_EN", "MCASP0_BUF_BT_EN", + "MCASP0_FET_SEL", "DSI_EDID", + "PD_I2C_IRQ", "IO_EXP_TEST_LED"; + + interrupt-parent = <&gpio0>; + interrupts = <91 IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + #interrupt-cells = <2>; + + pinctrl-names = "default"; + pinctrl-0 = <&gpio0_ioexp_intr_pins_default>; + bootph-all; + }; + + exp2: gpio@23 { + compatible = "ti,tca6424"; + reg = <0x23>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "BT_EN_SOC", "VOUT0_FET_SEL0", + "", "", + "", "", + "", "", + "WL_LT_EN", "EXP_PS_5V0_EN", + "TP45", "TP48", + "TP46", "TP49", + "TP47", "TP50", + "GPIO_QSPI_NAND_RSTn", "GPIO_HDMI_RSTn", + "GPIO_CPSW1_RST", "GPIO_CPSW2_RST", + "", "GPIO_AUD_RSTn", + "GPIO_eMMC_RSTn", "SoC_WLAN_SDIO_RST"; + bootph-all; + }; + +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_default>; + clock-frequency = <400000>; + status = "okay"; + + typec_pd0: tps658x@3f { + compatible = "ti,tps6598x"; + reg = <0x3f>; + + connector { + compatible = "usb-c-connector"; + label = "USB-C"; + self-powered; + data-role = "dual"; + power-role = "sink"; + + port { + usb_con_hs: endpoint { + remote-endpoint = <&usb0_hs_ep>; + }; + }; + }; + }; +}; + +&pmx0 { + gpio0_ioexp_intr_pins_default: gpio0-ioexp-intr-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x01b0, PIN_INPUT, 7) /* (B12) SPI0_D1.GPIO0_91 */ + >; + bootph-all; + }; + + i2c0_pins_default: i2c0-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x01cc, PIN_INPUT_PULLUP, 0) /* (B7) I2C0_SCL */ + AM62LX_IOPAD(0x01d0, PIN_INPUT_PULLUP, 0) /* (A7) I2C0_SDA */ + >; + bootph-all; + }; + + i2c1_pins_default: i2c1-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x01d4, PIN_INPUT_PULLUP, 0) /* (D7) I2C1_SCL */ + AM62LX_IOPAD(0x01d8, PIN_INPUT_PULLUP, 0) /* (A6) I2C1_SDA */ + >; + bootph-all; + }; + + i2c2_pins_default: i2c2-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x01dc, PIN_INPUT_PULLUP, 0) /* (B8) I2C2_SCL */ + AM62LX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D8) I2C2_SDA */ + >; + }; + + mmc0_pins_default: mmc0-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x0214, PIN_INPUT_PULLUP, 0) /* (D2) MMC0_CMD */ + AM62LX_IOPAD(0x020c, PIN_OUTPUT, 0) /* (B2) MMC0_CLK */ + AM62LX_IOPAD(0x0208, PIN_INPUT_PULLUP, 0) /* (D3) MMC0_DAT0 */ + AM62LX_IOPAD(0x0204, PIN_INPUT_PULLUP, 0) /* (D4) MMC0_DAT1 */ + AM62LX_IOPAD(0x0200, PIN_INPUT_PULLUP, 0) /* (C1) MMC0_DAT2 */ + AM62LX_IOPAD(0x01fc, PIN_INPUT_PULLUP, 0) /* (C2) MMC0_DAT3 */ + AM62LX_IOPAD(0x01f8, PIN_INPUT_PULLUP, 0) /* (C4) MMC0_DAT4 */ + AM62LX_IOPAD(0x01f4, PIN_INPUT_PULLUP, 0) /* (B3) MMC0_DAT5 */ + AM62LX_IOPAD(0x01f0, PIN_INPUT_PULLUP, 0) /* (A3) MMC0_DAT6 */ + AM62LX_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (B4) MMC0_DAT7 */ + >; + bootph-all; + }; + + mmc1_pins_default: mmc1-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x0230, PIN_INPUT, 0) /* (Y3) MMC1_CMD */ + AM62LX_IOPAD(0x0228, PIN_OUTPUT, 0) /* (Y2) MMC1_CLK */ + AM62LX_IOPAD(0x0224, PIN_INPUT, 0) /* (AA1) MMC1_DAT0 */ + AM62LX_IOPAD(0x0220, PIN_INPUT_PULLUP, 0) /* (Y4) MMC1_DAT1 */ + AM62LX_IOPAD(0x021c, PIN_INPUT_PULLUP, 0) /* (AA2) MMC1_DAT2 */ + AM62LX_IOPAD(0x0218, PIN_INPUT_PULLUP, 0) /* (AB2) MMC1_DAT3 */ + AM62LX_IOPAD(0x0234, PIN_INPUT, 0) /* (B6) MMC1_SDCD */ + >; + bootph-all; + }; + + uart0_pins_default: uart0-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x01b4, PIN_INPUT, 0) /* (D13) UART0_RXD */ + AM62LX_IOPAD(0x01b8, PIN_OUTPUT, 0) /* (C13) UART0_TXD */ + >; + bootph-all; + }; + + usb1_default_pins: usb1-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x0248, PIN_INPUT | PIN_DS_PULLUD_ENABLE | PIN_DS_PULL_UP, 0) /* (A5) USB1_DRVVBUS */ + >; + }; + + usr_button_pins_default: usr-button-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x01ac, PIN_INPUT, 7) /* (E12) SPI0_D0.GPIO0_90 */ + >; + }; + + usr_led_pins_default: usr-led-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x0238, PIN_OUTPUT, 7) /* (D24) MMC1_SDWP.GPIO0_123 */ + >; + }; + +}; + +&sdhci0 { + /* eMMC */ + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_default>; + non-removable; + status = "okay"; + bootph-all; +}; + +&sdhci1 { + /* SD/MMC */ + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_default>; + vmmc-supply = <&vdd_mmc1>; + disable-wp; + status = "okay"; + bootph-all; +}; + +&uart0 { + pinctrl-0 = <&uart0_pins_default>; + pinctrl-names = "default"; + status = "okay"; + bootph-all; +}; + +&usbss0 { + status = "okay"; + ti,vbus-divider; +}; + +&usb0 { + usb-role-switch; + + port { + usb0_hs_ep: endpoint { + remote-endpoint = <&usb_con_hs>; + }; + }; +}; + +&usbss1 { + status = "okay"; + ti,vbus-divider; +}; + +&usb1 { + dr_mode = "host"; + pinctrl-names = "default"; + pinctrl-0 = <&usb1_default_pins>; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am62l3.dtsi b/arch/arm64/boot/dts/ti/k3-am62l3.dtsi new file mode 100644 index 000000000000..da220b851512 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62l3.dtsi @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: GPL-2.0-only or MIT +/* + * Device Tree file for the AM62L3 SoC family (Dual Core A53) + * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ + * + * Technical Reference Manual: https://www.ti.com/lit/pdf/sprujb4 + */ + +/dts-v1/; + +#include "k3-am62l.dtsi" + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0: cluster0 { + core0 { + cpu = <&cpu0>; + }; + + core1 { + cpu = <&cpu1>; + }; + }; + }; + + cpu0: cpu@0 { + compatible = "arm,cortex-a53"; + reg = <0x000>; + device_type = "cpu"; + enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&l2_0>; + }; + + cpu1: cpu@1 { + compatible = "arm,cortex-a53"; + reg = <0x001>; + device_type = "cpu"; + enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&l2_0>; + }; + }; + + l2_0: l2-cache0 { + compatible = "cache"; + cache-unified; + cache-level = <2>; + cache-size = <0x40000>; + cache-line-size = <64>; + cache-sets = <256>; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi index 0c05bcf1d776..3cf7c2b3ce2d 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi @@ -46,6 +46,24 @@ #size-cells = <1>; ranges = <0x00 0x00 0x00100000 0x20000>; + audio_refclk0: clock-controller@82e0 { + compatible = "ti,am62-audio-refclk"; + reg = <0x82e0 0x4>; + clocks = <&k3_clks 157 0>; + assigned-clocks = <&k3_clks 157 0>; + assigned-clock-parents = <&k3_clks 157 16>; + #clock-cells = <0>; + }; + + audio_refclk1: clock-controller@82e4 { + compatible = "ti,am62-audio-refclk"; + reg = <0x82e4 0x4>; + clocks = <&k3_clks 157 18>; + assigned-clocks = <&k3_clks 157 18>; + assigned-clock-parents = <&k3_clks 157 34>; + #clock-cells = <0>; + }; + phy_gmii_sel: phy@4044 { compatible = "ti,am654-phy-gmii-sel"; reg = <0x4044 0x8>; diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi index 908cc0760e7d..13d32cbff186 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi @@ -42,26 +42,6 @@ ti,interrupt-ranges = <5 69 35>; }; -&main_conf { - audio_refclk0: clock-controller@82e0 { - compatible = "ti,am62-audio-refclk"; - reg = <0x82e0 0x4>; - clocks = <&k3_clks 157 0>; - assigned-clocks = <&k3_clks 157 0>; - assigned-clock-parents = <&k3_clks 157 16>; - #clock-cells = <0>; - }; - - audio_refclk1: clock-controller@82e4 { - compatible = "ti,am62-audio-refclk"; - reg = <0x82e4 0x4>; - clocks = <&k3_clks 157 18>; - assigned-clocks = <&k3_clks 157 18>; - assigned-clock-parents = <&k3_clks 157 34>; - #clock-cells = <0>; - }; -}; - &main_gpio0 { gpio-ranges = <&main_pmx0 0 0 32>, <&main_pmx0 32 33 38>, <&main_pmx0 70 72 22>; diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin-dev.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin-dev.dtsi index 0679d76f31bd..a0d5b15fc147 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-verdin-dev.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-verdin-dev.dtsi @@ -78,7 +78,7 @@ /* Verdin ETH_2_RGMII */ &cpsw_port2 { phy-handle = <&carrier_eth_phy>; - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; status = "okay"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin-ivy.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin-ivy.dtsi index 317c8818f9ee..04f13edcb166 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-verdin-ivy.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-verdin-ivy.dtsi @@ -275,7 +275,7 @@ /* Verdin ETH_2_RGMII */ &cpsw_port2 { phy-handle = <&carrier_eth_phy>; - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; status = "okay"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi index 99810047614e..5e050cbb9eaf 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi @@ -813,7 +813,7 @@ /* Verdin ETH_1 (On-module PHY) */ &cpsw_port1 { phy-handle = <&som_eth_phy>; - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62p.dtsi b/arch/arm64/boot/dts/ti/k3-am62p.dtsi index 75a15c368c11..e2c01328eb29 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p.dtsi @@ -44,6 +44,33 @@ interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; }; + system-idle-states { + system_partial_io: system-partial-io { + compatible = "system-idle-state"; + idle-state-name = "off-wake"; + }; + + system_io_ddr: system-io-ddr { + compatible = "system-idle-state"; + idle-state-name = "mem-deep"; + }; + + system_deep_sleep: system-deep-sleep { + compatible = "system-idle-state"; + idle-state-name = "mem"; + }; + + system_mcu_only: system-mcu-only { + compatible = "system-idle-state"; + idle-state-name = "mem-mcu-active"; + }; + + system_standby: system-standby { + compatible = "system-idle-state"; + idle-state-name = "standby"; + }; + }; + cbass_main: bus@f0000 { compatible = "simple-bus"; #address-cells = <2>; @@ -59,7 +86,7 @@ <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */ <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */ <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */ - <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */ + <0x00 0x0fd80000 0x00 0x0fd80000 0x00 0x00080000>, /* GPU */ <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>, /* Third peripheral window */ <0x00 0x30040000 0x00 0x30040000 0x00 0x00080000>, /* PRUSS-M */ <0x00 0x30101000 0x00 0x30101000 0x00 0x00010100>, /* CSI window */ diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts index a064a632680e..ef719c6334fc 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts @@ -541,14 +541,14 @@ }; &cpsw_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&cpsw3g_phy0>; status = "okay"; bootph-all; }; &cpsw_port2 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&cpsw3g_phy1>; status = "okay"; }; @@ -716,12 +716,52 @@ >; bootph-all; }; + + mcu_mcan0_tx_pins_default: mcu-mcan0-tx-default-pins { + pinctrl-single,pins = < + AM62PX_MCU_IOPAD(0x034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ + >; + }; + + mcu_mcan0_rx_pins_default: mcu-mcan0-rx-default-pins { + pinctrl-single,pins = < + AM62PX_MCU_IOPAD(0x038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ + >; + }; + + mcu_mcan0_rx_pins_wakeup: mcu-mcan0-rx-wakeup-pins { + pinctrl-single,pins = < + AM62PX_MCU_IOPAD(0x038, PIN_INPUT | PIN_WKUP_EN, 0) /* (B3) MCU_MCAN0_RX */ + >; + }; + + mcu_mcan1_tx_pins_default: mcu-mcan1-tx-default-pins { + pinctrl-single,pins = < + AM62PX_MCU_IOPAD(0x03c, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX */ + >; + }; + + mcu_mcan1_rx_pins_default: mcu-mcan1-rx-default-pins { + pinctrl-single,pins = < + AM62PX_MCU_IOPAD(0x040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX */ + >; + }; + + mcu_mcan1_rx_pins_wakeup: mcu-mcan1-rx-wakeup-pins { + pinctrl-single,pins = < + AM62PX_MCU_IOPAD(0x040, PIN_INPUT | PIN_WKUP_EN, 0) /* (D4) MCU_MCAN1_RX */ + >; + }; }; &wkup_uart0 { /* WKUP UART0 is used by DM firmware */ pinctrl-names = "default"; pinctrl-0 = <&wkup_uart0_pins_default>; + wakeup-source = <&system_io_ddr>, + <&system_deep_sleep>, + <&system_mcu_only>, + <&system_standby>; status = "reserved"; bootph-all; }; @@ -763,4 +803,33 @@ status = "okay"; }; +&mcu_mcan0 { + pinctrl-names = "default", "wakeup"; + pinctrl-0 = <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_default>; + pinctrl-1 = <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_wakeup>; + wakeup-source = <&system_partial_io>, + <&system_io_ddr>, + <&system_deep_sleep>, + <&system_mcu_only>, + <&system_standby>; +}; + +&mcu_mcan1 { + pinctrl-names = "default", "wakeup"; + pinctrl-0 = <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_default>; + pinctrl-1 = <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_wakeup>; + wakeup-source = <&system_partial_io>, + <&system_io_ddr>, + <&system_deep_sleep>, + <&system_mcu_only>, + <&system_standby>; +}; + +&mcu_uart0 { + wakeup-source = <&system_io_ddr>, + <&system_deep_sleep>, + <&system_mcu_only>, + <&system_standby>; +}; + #include "k3-am62p-ti-ipc-firmware.dtsi" diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi index edaa4f99295d..fc5a3942cde0 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi @@ -63,18 +63,6 @@ no-map; }; - mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 { - compatible = "shared-dma-pool"; - reg = <0x00 0x9b800000 0x00 0x00100000>; - no-map; - }; - - mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 { - compatible = "shared-dma-pool"; - reg = <0x00 0x9b900000 0x00 0x00f00000>; - no-map; - }; - wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { compatible = "shared-dma-pool"; reg = <0x00 0x9c800000 0x00 0x00100000>; @@ -124,6 +112,38 @@ enable-active-high; regulator-always-on; }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,bitclock-master = <&codec_dai>; + simple-audio-card,format = "dsp_b"; + simple-audio-card,frame-master = <&codec_dai>; + simple-audio-card,name = "wm8904-audio"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,routing = + "Headphone Jack", "HPOUTL", + "Headphone Jack", "HPOUTR", + "IN2L", "Line In Jack", + "IN2R", "Line In Jack", + "IN1L", "Microphone Jack", + "IN1R", "Microphone Jack"; + simple-audio-card,widgets = + "Microphone", "Microphone Jack", + "Headphone", "Headphone Jack", + "Line", "Line In Jack"; + + codec_dai: simple-audio-card,codec { + sound-dai = <&wm8904>; + }; + + simple-audio-card,cpu { + sound-dai = <&mcasp1>; + }; + }; +}; + +&audio_refclk1 { + assigned-clock-rates = <100000000>; }; &cpsw3g { @@ -161,6 +181,19 @@ pinctrl-0 = <&pinctrl_i2c2>; clock-frequency = <400000>; status = "okay"; + + wm8904: audio-codec@1a { + compatible = "wlf,wm8904"; + reg = <0x1a>; + #sound-dai-cells = <0>; + clocks = <&audio_refclk1>; + clock-names = "mclk"; + AVDD-supply = <®_1v8>; + CPVDD-supply = <®_1v8>; + DBVDD-supply = <®_3v3>; + DCVDD-supply = <®_1v8>; + MICVDD-supply = <®_1v8>; + }; }; &main_i2c3 { @@ -191,6 +224,16 @@ >; }; + pinctrl_mcasp1: main-mcasp1-default-pins { + pinctrl-single,pins = < + AM62PX_IOPAD(0x0090, PIN_INPUT, 2) /* (U24) GPMC0_BE0n_CLE.MCASP1_ACLKX */ + AM62PX_IOPAD(0x0098, PIN_INPUT, 2) /* (AA24) GPMC0_WAIT0.MCASP1_AFSX */ + AM62PX_IOPAD(0x008c, PIN_OUTPUT, 2) /* (T25) GPMC0_WEn.MCASP1_AXR0 */ + AM62PX_IOPAD(0x0084, PIN_INPUT, 2) /* (R25) GPMC0_ADVn_ALE.MCASP1_AXR2 */ + AM62PX_IOPAD(0x00a0, PIN_OUTPUT, 1) /* (P24) GPMC0_WPn.AUDIO_EXT_REFCLK1 */ + >; + }; + pinctrl_mdio1: main-mdio1-default-pins { pinctrl-single,pins = < AM62PX_IOPAD(0x0160, PIN_OUTPUT, 0) /* (F17) MDIO0_MDC */ @@ -279,6 +322,30 @@ pinctrl-0 = <&pinctrl_spi0>; ti,pindir-d0-out-d1-in; status = "okay"; + + /* Resistive touch controller */ + ads7846: touchscreen@0 { + compatible = "ti,ads7846"; + reg = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_restouch>; + interrupt-parent = <&main_gpio0>; + interrupts = <48 IRQ_TYPE_EDGE_FALLING>; + spi-max-frequency = <1500000>; + pendown-gpio = <&main_gpio0 48 GPIO_ACTIVE_LOW>; + ti,x-min = /bits/ 16 <125>; + ti,x-max = /bits/ 16 <4008>; + ti,y-min = /bits/ 16 <282>; + ti,y-max = /bits/ 16 <3864>; + ti,x-plate-ohms = /bits/ 16 <180>; + ti,pressure-max = /bits/ 16 <255>; + ti,debounce-max = /bits/ 16 <10>; + ti,debounce-tol = /bits/ 16 <3>; + ti,debounce-rep = /bits/ 16 <1>; + ti,settle-delay-usec = /bits/ 16 <150>; + ti,keep-vref-on; + wakeup-source; + }; }; &main_uart5 { @@ -292,6 +359,23 @@ }; }; +&mcasp1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcasp1>; + op-mode = <0>; /* MCASP_IIS_MODE */ + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ + 1 0 2 0 + 0 0 0 0 + 0 0 0 0 + 0 0 0 0 + >; + tdm-slots = <2>; + tx-num-evt = <0>; + rx-num-evt = <0>; + #sound-dai-cells = <0>; + status = "okay"; +}; + &sdhci0 { /* On-module eMMC */ ti,driver-strength-ohm = <50>; @@ -320,44 +404,6 @@ ti,vbus-divider; }; -&mailbox0_cluster0 { - status = "okay"; - - mbox_r5_0: mbox-r5-0 { - ti,mbox-rx = <0 0 0>; - ti,mbox-tx = <1 0 0>; - }; -}; - -&mailbox0_cluster1 { - status = "okay"; - - mbox_mcu_r5_0: mbox-mcu-r5-0 { - ti,mbox-rx = <0 0 0>; - ti,mbox-tx = <1 0 0>; - }; -}; - -&mcu_r5fss0 { - status = "okay"; -}; - -&mcu_r5fss0_core0 { - mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>; - memory-region = <&mcu_r5fss0_core0_dma_memory_region>, - <&mcu_r5fss0_core0_memory_region>; -}; - -&wkup_r5fss0 { - status = "okay"; -}; - -&wkup_r5fss0_core0 { - mboxes = <&mailbox0_cluster0 &mbox_r5_0>; - memory-region = <&wkup_r5fss0_core0_dma_memory_region>, - <&wkup_r5fss0_core0_memory_region>; -}; - /* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */ &mcu_gpio0 { status = "reserved"; @@ -385,3 +431,5 @@ /* Main UART1 is used by TIFS firmware */ status = "reserved"; }; + +#include "k3-am62p-ti-ipc-firmware.dtsi" diff --git a/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi b/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi index aab74d6019b0..d6e70ee15938 100644 --- a/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi @@ -291,7 +291,7 @@ }; &cpsw_port2 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&cpsw3g_phy3>; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi index 58f78c0de292..50ed859ae06c 100644 --- a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi @@ -438,7 +438,7 @@ &cpsw_port1 { bootph-all; - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&cpsw3g_phy0>; }; diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi index 02ef1dd92eaa..d64fb81b04e2 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi @@ -178,7 +178,7 @@ }; &cpsw_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&cpsw3g_phy1>; bootph-all; status = "okay"; diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index 85dcff104936..88093ab74502 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -579,13 +579,13 @@ &cpsw_port1 { bootph-all; - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&cpsw3g_phy0>; status = "okay"; }; &cpsw_port2 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&cpsw3g_phy3>; status = "okay"; }; @@ -608,6 +608,9 @@ /* ADC is reserved for R5 usage */ status = "reserved"; + dmas = <&main_bcdma 0 0x440f 0>, <&main_bcdma 0 0x4410 0>; + dma-names = "fifo0", "fifo1"; + adc { ti,adc-channels = <0 1 2 3 4 5 6 7>; }; diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index 1fb1b91a1bad..34bfa99bd4b8 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -499,13 +499,13 @@ }; &cpsw_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&cpsw3g_phy0>; status = "okay"; }; &cpsw_port2 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&cpsw3g_phy1>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts index 8f64d6272b1b..46be6824dd16 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts @@ -175,6 +175,7 @@ regulator-max-microvolt = <3300000>; gpio = <&main_gpio1 43 GPIO_ACTIVE_HIGH>; enable-active-high; + bootph-all; }; }; @@ -185,7 +186,7 @@ }; &cpsw_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&cpsw3g_phy0>; status = "okay"; }; @@ -260,6 +261,7 @@ "", "", "STATUS_OUT_3", "EN_DIG_OUT_4", /* 32-35 */ "", "", "STATUS_OUT_4", "DIG_IN_1", /* 36-39 */ "DIG_IN_2", "DIG_IN_3", "DIG_IN_4"; /* 40- */ + bootph-all; }; &main_gpio1 { @@ -285,6 +287,7 @@ "", "", "", "", /* 60-63 */ "", "", "", "ADC_INT#", /* 64-67 */ "BG95_PWRKEY", "BG95_RESET"; /* 68- */ + bootph-all; line50-hog { /* See also usb0 */ @@ -334,6 +337,7 @@ &main_uart0 { pinctrl-names = "default"; pinctrl-0 = <&main_uart0_pins>; + bootph-pre-ram; status = "okay"; }; @@ -493,6 +497,11 @@ &serdes_ln_ctrl { idle-states = <AM64_SERDES0_LANE0_USB>; + bootph-all; +}; + +&serdes_refclk { + bootph-all; }; &serdes0 { @@ -500,6 +509,7 @@ reg = <0>; #phy-cells = <0>; resets = <&serdes_wiz0 1>; + bootph-all; cdns,num-lanes = <1>; cdns,phy-type = <PHY_TYPE_USB3>; }; @@ -512,6 +522,7 @@ cd-gpios = <&main_gpio1 77 GPIO_ACTIVE_LOW>; disable-wp; no-mmc; + bootph-all; ti,fails-without-test-cd; /* Enabled by overlay */ }; @@ -535,9 +546,11 @@ maximum-speed = "super-speed"; phys = <&serdes0_usb_link>; phy-names = "cdns3,usb3-phy"; + bootph-all; }; &usbss0 { + bootph-all; ti,vbus-divider; }; @@ -625,6 +638,7 @@ /* (P19) GPMC0_CSn2.GPIO0_43 - MMC1_CTRL */ AM64X_IOPAD(0x00b0, PIN_OUTPUT, 7) >; + bootph-all; }; main_gpio1_hog_pins: main-gpio1-hog-pins { @@ -748,6 +762,7 @@ /* (#N/A) MMC1_CLKLB */ AM64X_IOPAD(0x0290, PIN_INPUT, 0) >; + bootph-all; }; main_mmc1_reg_pins: main-mmc1-reg-pins { @@ -755,6 +770,7 @@ /* (C13) SPI0_CS1.GPIO1_43 - MMC1_SD_EN */ AM64X_IOPAD(0x020c, PIN_OUTPUT, 7) >; + bootph-all; }; main_mmc1_wifi_pwrseq_pins: main-mmc1-wifi-pwrseq-pins { @@ -797,6 +813,7 @@ /* (C16) UART0_TXD */ AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) >; + bootph-pre-ram; }; main_uart1_pins: main-uart1-pins { @@ -865,6 +882,7 @@ /* (E19) USB0_DRVVBUS */ AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) >; + bootph-all; }; pru_icssg1_mdio_pins: pru-icssg1-mdio-pins { diff --git a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi index ff3b2e0b8dd4..dde19d0784e3 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi @@ -17,7 +17,7 @@ device_type = "memory"; /* 1G RAM - default variant */ reg = <0x00000000 0x80000000 0x00000000 0x40000000>; - + bootph-pre-ram; }; reserved_memory: reserved-memory { @@ -54,10 +54,15 @@ }; }; +&fss { + bootph-all; +}; + &main_i2c0 { pinctrl-names = "default"; pinctrl-0 = <&main_i2c0_pins>; clock-frequency = <400000>; + bootph-pre-ram; status = "okay"; tmp1075: temperature-sensor@4a { @@ -72,6 +77,7 @@ vcc-supply = <®_1v8>; pagesize = <16>; read-only; + bootph-pre-ram; }; pcf85063: rtc@51 { @@ -89,9 +95,10 @@ }; &ospi0 { - status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&ospi0_pins>; + bootph-all; + status = "okay"; flash@0 { compatible = "jedec,spi-nor"; @@ -99,6 +106,7 @@ spi-tx-bus-width = <8>; spi-rx-bus-width = <8>; spi-max-frequency = <84000000>; + bootph-all; cdns,tshsl-ns = <60>; cdns,tsd2d-ns = <60>; cdns,tchsh-ns = <60>; @@ -121,6 +129,7 @@ disable-wp; no-sdio; no-sd; + bootph-all; ti,driver-strength-ohm = <50>; }; @@ -132,6 +141,7 @@ /* (B18) I2C0_SDA */ AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) >; + bootph-pre-ram; }; ospi0_pins: ospi0-pins { @@ -159,6 +169,7 @@ /* (N19) OSPI0_DQS */ AM64X_IOPAD(0x0008, PIN_INPUT, 0) >; + bootph-all; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi index 42ba3dab2fc1..a9a4e7401a49 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi @@ -457,10 +457,6 @@ #size-cells = <0>; }; -&mcu_cpsw { - status = "disabled"; -}; - &sdhci1 { status = "okay"; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi index f6d9a5779918..74439e0c16a5 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi @@ -354,6 +354,8 @@ "tx4", "tx5", "tx6", "tx7", "rx"; + status = "disabled"; + ethernet-ports { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts index 0c42c486d83a..46c58162eca0 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -571,6 +571,7 @@ &mcu_cpsw { pinctrl-names = "default"; pinctrl-0 = <&mcu_cpsw_pins_default>; + status = "okay"; }; &davinci_mdio { @@ -586,7 +587,7 @@ }; &cpsw_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&phy0>; }; diff --git a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts index b697035df04e..5255e04b9ac7 100644 --- a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts +++ b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts @@ -249,7 +249,7 @@ }; &cpsw_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&cpsw3g_phy0>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-ads2.dtso b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-ads2.dtso new file mode 100644 index 000000000000..ae5e2b52594b --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-ads2.dtso @@ -0,0 +1,146 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Kontron SMARC-sa67 board on the Kontron Eval Carrier 2.2. + * + * Copyright (c) 2025 Kontron Europe GmbH + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/irq.h> +#include "k3-pinctrl.h" + +&{/} { + pwm-fan { + compatible = "pwm-fan"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm_fan_pins_default>; + interrupts-extended = <&main_gpio1 7 IRQ_TYPE_EDGE_FALLING>; + #cooling-cells = <2>; + pwms = <&epwm2 1 4000000 0>; + cooling-levels = <1 128 192 255>; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,widgets = + "Headphone", "Headphone Jack", + "Line", "Line Out Jack", + "Microphone", "Microphone Jack", + "Line", "Line In Jack"; + simple-audio-card,routing = + "Line Out Jack", "LINEOUTR", + "Line Out Jack", "LINEOUTL", + "Headphone Jack", "HPOUTR", + "Headphone Jack", "HPOUTL", + "IN1L", "Line In Jack", + "IN1R", "Line In Jack", + "Microphone Jack", "MICBIAS", + "IN2L", "Microphone Jack", + "IN2R", "Microphone Jack"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&dailink0_master>; + simple-audio-card,frame-master = <&dailink0_master>; + + simple-audio-card,cpu { + sound-dai = <&mcasp0>; + }; + + dailink0_master: simple-audio-card,codec { + sound-dai = <&wm8904>; + clocks = <&audio_refclk0>; + }; + }; + + cvcc_1p8v_i2s: regulator-carrier-0 { + compatible = "regulator-fixed"; + regulator-name = "V_1V8_S0_I2S"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + cvcc_1p8v_s0: regulator-carrier-1 { + compatible = "regulator-fixed"; + regulator-name = "V_1V8_S0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + cvcc_3p3v_s0: regulator-carrier-2 { + compatible = "regulator-fixed"; + regulator-name = "V_3V3_S0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&audio_refclk0 { + status = "okay"; +}; + +&epwm2 { + status = "okay"; +}; + +&main_pmx0 { + pwm_fan_pins_default: pwm-fan-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x1ec, PIN_OUTPUT, 8) /* (A22) I2C1_SDA.EHRPWM2_B */ + J722S_IOPAD(0x194, PIN_INPUT, 0) /* (A25) MCASP0_AXR3.GPIO1_7 */ + >; + }; +}; + +&mcasp0 { + #sound-dai-cells = <0>; + status = "okay"; +}; + +&mcu_i2c0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + wm8904: audio-codec@1a { + #sound-dai-cells = <0>; + compatible = "wlf,wm8904"; + reg = <0x1a>; + clocks = <&audio_refclk0>; + clock-names = "mclk"; + AVDD-supply = <&cvcc_1p8v_i2s>; + CPVDD-supply = <&cvcc_1p8v_i2s>; + DBVDD-supply = <&cvcc_1p8v_i2s>; + DCVDD-supply = <&cvcc_1p8v_i2s>; + MICVDD-supply = <&cvcc_1p8v_i2s>; + }; +}; + +&mcu_spi0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <104000000>; + m25p,fast-read; + vcc-supply = <&cvcc_1p8v_s0>; + }; +}; + +&wkup_i2c0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + /* SMARC Carrier EEPROM */ + eeprom@57 { + compatible = "atmel,24c32"; + reg = <0x57>; + pagesize = <32>; + vcc-supply = <&cvcc_3p3v_s0>; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-base.dts b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-base.dts new file mode 100644 index 000000000000..7169d934adac --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-base.dts @@ -0,0 +1,1091 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Kontron SMARC-sAM67 module + * + * Copyright (c) 2025 Kontron Europe GmbH + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/phy/phy.h> +#include "k3-j722s.dtsi" +#include "k3-serdes.h" + +/ { + compatible = "kontron,sa67", "ti,j722s"; + model = "Kontron SMARC-sAM67"; + + aliases { + serial0 = &mcu_uart0; + serial1 = &main_uart0; + serial2 = &main_uart5; + serial3 = &wkup_uart0; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + rtc0 = &wkup_rtc0; + }; + + lcd0_backlight: backlight-1 { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&lcd0_backlight_pins_default>; + pwms = <&epwm1 0 50000 0>; + brightness-levels = <0 32 64 96 128 160 192 224 255>; + default-brightness-level = <8>; + enable-gpios = <&main_gpio0 29 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; + + lcd1_backlight: backlight-2 { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&lcd1_backlight_pins_default>; + pwms = <&epwm1 1 50000 0>; + brightness-levels = <0 32 64 96 128 160 192 224 255>; + default-brightness-level = <8>; + enable-gpios = <&main_gpio1 18 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; + + chosen { + stdout-path = "serial1:115200n8"; + }; + + connector-1 { + compatible = "gpio-usb-b-connector", "usb-b-connector"; + pinctrl-names = "default"; + pinctrl-0 = <&usb0_connector_pins_default>; + type = "micro"; + id-gpios = <&main_gpio0 34 GPIO_ACTIVE_HIGH>; + vbus-supply = <&vcc_usb0_vbus>; + + port { + usb0_connector: endpoint { + remote-endpoint = <&usb0_hc>; + }; + }; + + }; + + memory@80000000 { + /* Filled in by bootloader */ + reg = <0x00000000 0x00000000 0x00000000 0x00000000>, + <0x00000000 0x00000000 0x00000000 0x00000000>; + device_type = "memory"; + bootph-pre-ram; + }; + + reserved_memory: reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x10000000>; + alignment = <0x2000>; + linux,cma-default; + }; + + secure_tfa_ddr: tfa@9e780000 { + reg = <0x00 0x9e780000 0x00 0x80000>; + no-map; + }; + + secure_ddr: optee@9e800000 { + reg = <0x00 0x9e800000 0x00 0x01800000>; + no-map; + }; + + wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa0100000 0x00 0xf00000>; + no-map; + }; + }; + + vin_5p0: regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "V_3V0_5V25_IN"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + bootph-all; + }; + + vcc_3p3_s5: regulator-2 { + compatible = "regulator-fixed"; + regulator-name = "V_3V3_S5"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vin_5p0>; + regulator-always-on; + regulator-boot-on; + bootph-all; + }; + + vcc_1p8_s5: regulator-3 { + compatible = "regulator-fixed"; + regulator-name = "V_1V8_S5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vin_5p0>; + regulator-always-on; + regulator-boot-on; + bootph-all; + }; + + vcc_3p3_s0: regulator-4 { + compatible = "regulator-fixed"; + regulator-name = "V_3V3_S0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_3p3_s5>; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpios = <&tps652g1 1 GPIO_ACTIVE_HIGH>; + bootph-all; + }; + + vcc_3p3_sd_s0: regulator-5 { + compatible = "regulator-fixed"; + regulator-name = "SDIO_PWR_EN"; + pinctrl-names = "default"; + pinctrl-0 = <&vcc_3p3_sd_s0_pins_default>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + enable-active-high; + gpios = <&main_gpio0 7 GPIO_ACTIVE_HIGH>; + bootph-all; + }; + + vcc_3p3_sd_vio_s0: regulator-6 { + compatible = "regulator-gpio"; + regulator-name = "V_3V3_1V8_SD_S0"; + pinctrl-names = "default"; + pinctrl-0 = <&vcc_3p3_sd_vio_s0_pins_default>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_3p3_s0>; + regulator-boot-on; + enable-gpios = <&main_gpio0 7 GPIO_ACTIVE_HIGH>; + gpios = <&main_gpio0 8 GPIO_ACTIVE_HIGH>; + states = <3300000 0x0>, + <1800000 0x1>; + bootph-all; + }; + + vcc_3p3_cam_s0: regulator-7 { + compatible = "regulator-fixed"; + regulator-name = "V_3V3_CAM_S0"; + pinctrl-names = "default"; + pinctrl-0 = <&vcc_3p3_cam_s0_pins_default>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_3p3_s5>; + enable-active-high; + interrupts-extended = <&main_gpio1 30 IRQ_TYPE_EDGE_FALLING>; + bootph-all; + }; + + vcc_1p1_s0: regulator-8 { + compatible = "regulator-fixed"; + regulator-name = "V_1V1_S0"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + vin-supply = <&vcc_1p1_s3>; + regulator-always-on; + regulator-boot-on; + enable-active-high; + /* shared with V_0V75_0V85_CORE_S0 */ + gpios = <&tps652g1 4 GPIO_ACTIVE_HIGH>; + bootph-all; + }; + + vcc_0p85_vcore_s0: regulator-9 { + compatible = "regulator-fixed"; + regulator-name = "V_0V75_0V85_CORE_S0"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + vin-supply = <&vin_5p0>; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpios = <&tps652g1 4 GPIO_ACTIVE_HIGH>; + bootph-all; + }; + + vcc_lcd0_panel: regulator-10 { + compatible = "regulator-fixed"; + regulator-name = "LCD0_VDD_EN"; + pinctrl-names = "default"; + pinctrl-0 = <&vcc_lcd0_panel_pins_default>; + enable-active-high; + gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>; + }; + + vcc_lcd1_panel: regulator-11 { + compatible = "regulator-fixed"; + regulator-name = "LCD1_VDD_EN"; + pinctrl-names = "default"; + pinctrl-0 = <&vcc_lcd1_panel_pins_default>; + enable-active-high; + gpios = <&main_gpio1 19 GPIO_ACTIVE_HIGH>; + }; + + vcc_usb0_vbus: regulator-12 { + compatible = "regulator-fixed"; + regulator-name = "USB0_EN_OC#"; + pinctrl-names = "default"; + pinctrl-0 = <&vcc_usb0_vbus_pins_default>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpios = <&main_gpio1 50 GPIO_ACTIVE_HIGH>; + }; +}; + +&audio_refclk0 { + pinctrl-names = "default"; + pinctrl-0 = <&audio_refclk0_pins_default>; + status = "disabled"; +}; + +&audio_refclk1 { + pinctrl-names = "default"; + pinctrl-0 = <&audio_refclk1_pins_default>; + status = "disabled"; +}; + +&cpsw3g { + pinctrl-names = "default"; + pinctrl-0 = <&cpsw3g_pins_default>, <&rgmii1_pins_default>, + <&rgmii2_pins_default>; + status = "okay"; +}; + +&cpsw3g_mdio { + pinctrl-names = "default"; + pinctrl-0 = <&cpsw3g_mdio_pins_default>; + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +&cpsw_port1 { + phy-connection-type = "rgmii-id"; + phy-handle = <&phy0>; + nvmem-cells = <&base_mac_address 0>; + nvmem-cell-names = "mac-address"; + status = "okay"; +}; + +&main_gpio0 { + gpio-line-names = + "", "", "", "", "", "", "", "SOC_SDIO_PWR_EN", "VSD_SEL", + "RESET_OUT#", "I2C_MUX_RST#", "SPI_FLASH_CS#", "QPSI_CS0#", + "QSPI_CS1#", "BOOT_SEL1", "BRDCFG0", "BRDCFG1", "BRDCFG2", + "BRDCFG3", "BRDCFG4", "", "BRDREV0", "BRDREV1", "", "", "", "", + "", "", "LCD0_BKLT_EN", "LCD0_VDD_EN", "GBE_INT#", "DSI0_TE", + "CHARGING#", "USB0_OTG_ID", "PMIC_INT#", "RTC_INT#", + "EDP_BRIDGE_EN", "EDP_BRIDGE_IRQ#", "", "CHARGER_PRSNT#", "", + "", "", "", "BOOT_SEL2#", "CAM2_RST#", "CAM2_PWR#", "", + "CAM3_RST#", "CAM3_PWR#", "GPIO0", "GPIO1", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", "", "GPIO10", "GPIO11", + "SLEEP#", "LID#"; + + bootph-all; + status = "okay"; +}; + +&main_gpio1 { + gpio-line-names = + "", "", "", "", "", "", "", "GPIO6", "GPIO7", "", "", "", "", + "GPIO8", "GPIO9", "PCIE_A_RST#", "", "BATLOW#", "LCD1_BKLT_EN", + "LCD1_VDD_EN", "", "", "", "", "GPIO2", "GPIO3", "", "", + "GPIO4", "GPIO5", "CAM_S0_FAULT#", "BOOT_SEL0#", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", "", "", "SDIO_CD#", "", + "USB0_DRVVBUS", "USB1_DRVVBUS"; + + bootph-all; + status = "okay"; +}; + +/* I2C_LOCAL */ +&main_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_pins_default>; + clock-frequency = <100000>; + bootph-all; + status = "okay"; + + tps652g1: pmic@44 { + compatible = "ti,tps652g1"; + reg = <0x44>; + ti,primary-pmic; + system-power-controller; + + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = + "LPM_EN#", "EN_3V3_S0", "POWER_BTN#", "CARRIER_STBY#", + "EN_0V75_0V85_VCORE_S0", "PMIC_WAKEUP"; + + pinctrl-names = "default"; + pinctrl-0 = <&pmic_irq_pins_default>; + interrupts-extended = <&main_gpio0 35 IRQ_TYPE_EDGE_FALLING>; + + buck1-supply = <&vin_5p0>; + buck2-supply = <&vin_5p0>; + buck3-supply = <&vin_5p0>; + buck4-supply = <&vin_5p0>; + ldo1-supply = <&vin_5p0>; + ldo2-supply = <&vin_5p0>; + ldo3-supply = <&vin_5p0>; + + bootph-all; + + regulators { + vcc_0p85_s0: buck1 { + regulator-name = "V_0V85_S0"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + vcc_1p1_s3: buck2 { + regulator-name = "V_1V1_S3"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + vcc_1p8_s0: buck3 { + regulator-name = "V_1V8_S0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + vcc_1p2_s0: buck4 { + regulator-name = "V_1V2_S0"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + regulator-always-on; + }; + + vcc_1p8_vda_pll_s0: ldo1 { + regulator-name = "V_1V8_VDA_PLL_S0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + vcc_1p8_s3: ldo2 { + regulator-name = "V_1V8_S3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + vcc_1p8_ret_s5: ldo3 { + regulator-name = "V_1V8_RET_S5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + + system-controller@4a { + compatible = "kontron,sa67mcu", "kontron,sl28cpld"; + reg = <0x4a>; + #address-cells = <1>; + #size-cells = <0>; + + watchdog@4 { + compatible = "kontron,sa67mcu-wdt", "kontron,sl28cpld-wdt"; + reg = <0x4>; + kontron,assert-wdt-timeout-pin; + }; + + hwmon@8 { + compatible = "kontron,sa67mcu-hwmon"; + reg = <0x8>; + }; + }; +}; + +/* I2C_CAM */ +&main_i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c2_pins_default>; + clock-frequency = <100000>; + status = "okay"; + + i2c-mux@70 { + compatible = "nxp,pca9546"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + pinctrl-names = "default"; + pinctrl-0 = <&i2c_mux_pins_default>; + + vdd-supply = <&vcc_1p8_s0>; + reset-gpios = <&main_gpio0 10 GPIO_ACTIVE_LOW>; + + i2c_cam0: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c_cam1: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + i2c_cam2: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + i2c_cam3: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + }; +}; + +/* I2C_LCD */ +&main_i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c3_pins_default>; + clock-frequency = <100000>; + status = "okay"; +}; + +&main_pmx0 { + audio_refclk0_pins_default: audio-refclk0-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x0c4, PIN_OUTPUT, 5) /* (W23) VOUT0_DATA3.AUDIO_EXT_REFCLK0 */ + >; + }; + + audio_refclk1_pins_default: audio-refclk1-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x0a0, PIN_OUTPUT, 1) /* (N24) GPMC0_WPn.AUDIO_EXT_REFCLK1 */ + >; + }; + + cpsw3g_mdio_pins_default: cpsw3g-mdio-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */ + J722S_IOPAD(0x15c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */ + >; + }; + + cpsw3g_pins_default: cpsw3g-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x1b8, PIN_OUTPUT, 1) /* (C20) SPI0_CS1.CP_GEMAC_CPTS0_TS_COMP */ + >; + }; + + edp_bridge_pins_default: edp-bridge-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x098, PIN_OUTPUT, 7) /* (V21) GPMC0_WAIT0.GPIO0_37 */ + J722S_IOPAD(0x09c, PIN_INPUT, 7) /* (W26) GPMC0_WAIT1.GPIO0_38 */ + >; + }; + + i2c_mux_pins_default: i2c-mux-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x028, PIN_OUTPUT, 7) /* (M27) OSPI0_D7.GPIO0_10 */ + >; + }; + + lcd0_backlight_pins_default: lcd0-backlight-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x074, PIN_OUTPUT, 7) /* (V22) GPMC0_AD14.GPIO0_29 */ + J722S_IOPAD(0x110, PIN_OUTPUT, 4) /* (G27) MMC2_DAT1.EHRPWM1_A */ + >; + }; + + lcd1_backlight_pins_default: lcd1-backlight-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x1c0, PIN_OUTPUT, 7) /* (E19) SPI0_D0.GPIO1_18 */ + J722S_IOPAD(0x114, PIN_OUTPUT, 4) /* (G26) MMC2_DAT0.EHRPWM1_B */ + >; + }; + + main_i2c0_pins_default: main-i2c0-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x1e0, PIN_INPUT, 0) /* (D23) I2C0_SCL */ + J722S_IOPAD(0x1e4, PIN_INPUT, 0) /* (B22) I2C0_SDA */ + >; + bootph-all; + }; + + main_i2c2_pins_default: main-i2c2-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x0b0, PIN_INPUT, 1) /* (P22) GPMC0_CSn2.I2C2_SCL */ + J722S_IOPAD(0x0b4, PIN_INPUT, 1) /* (P23) GPMC0_CSn3.I2C2_SDA */ + >; + }; + + main_i2c3_pins_default: main-i2c3-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x1d0, PIN_INPUT, 2) /* (E22) UART0_CTSn.I2C3_SCL */ + J722S_IOPAD(0x1d4, PIN_INPUT, 2) /* (B21) UART0_RTSn.I2C3_SDA */ + >; + }; + + main_i2c4_pins_default: main-i2c4-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x0a8, PIN_INPUT, 1) /* (R27) GPMC0_CSn0.I2C4_SCL */ + J722S_IOPAD(0x0ac, PIN_INPUT, 1) /* (P21) GPMC0_CSn1.I2C4_SDA */ + >; + }; + + main_uart0_pins_default: main-uart0-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x1c8, PIN_INPUT, 0) /* (F19) UART0_RXD */ + J722S_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (F20) UART0_TXD */ + >; + bootph-all; + }; + + main_uart5_pins_default: main-uart5-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x108, PIN_INPUT, 3) /* (J27) MMC2_DAT3.UART5_RXD */ + J722S_IOPAD(0x10c, PIN_OUTPUT, 3) /* (H27) MMC2_DAT2.UART5_TXD */ + J722S_IOPAD(0x008, PIN_INPUT, 5) /* (L22) OSPI0_DQS.UART5_CTSn */ + J722S_IOPAD(0x004, PIN_OUTPUT, 5) /* (L23) OSPI0_LBCLKO.UART5_RTSn */ + >; + }; + + mcasp0_pins_default: mcasp0-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x1a4, PIN_INPUT, 0) /* (D25) MCASP0_ACLKX */ + J722S_IOPAD(0x1a8, PIN_INPUT, 0) /* (C26) MCASP0_AFSX */ + J722S_IOPAD(0x1a0, PIN_INPUT, 0) /* (F23) MCASP0_AXR0 */ + J722S_IOPAD(0x19c, PIN_OUTPUT, 0) /* (B25) MCASP0_AXR1 */ + >; + }; + + mcasp2_pins_default: mcasp2-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x070, PIN_INPUT, 3) /* (V24) GPMC0_AD13.MCASP2_ACLKX */ + J722S_IOPAD(0x06c, PIN_INPUT, 3) /* (V26) GPMC0_AD12.MCASP2_AFSX */ + J722S_IOPAD(0x05c, PIN_INPUT, 3) /* (U27) GPMC0_AD8.MCASP2_AXR0 */ + J722S_IOPAD(0x060, PIN_OUTPUT, 3) /* (U26) GPMC0_AD9.MCASP2_AXR1 */ + >; + }; + + oldi0_pins_default: oldi0-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x260, PIN_OUTPUT, 0) /* (AF23) OLDI0_A0N */ + J722S_IOPAD(0x25c, PIN_OUTPUT, 0) /* (AG24) OLDI0_A0P */ + J722S_IOPAD(0x268, PIN_OUTPUT, 0) /* (AG22) OLDI0_A1N */ + J722S_IOPAD(0x264, PIN_OUTPUT, 0) /* (AG23) OLDI0_A1P */ + J722S_IOPAD(0x270, PIN_OUTPUT, 0) /* (AB20) OLDI0_A2N */ + J722S_IOPAD(0x26c, PIN_OUTPUT, 0) /* (AB21) OLDI0_A2P */ + J722S_IOPAD(0x278, PIN_OUTPUT, 0) /* (AG20) OLDI0_A3N */ + J722S_IOPAD(0x274, PIN_OUTPUT, 0) /* (AG21) OLDI0_A3P */ + J722S_IOPAD(0x2a0, PIN_OUTPUT, 0) /* (AF21) OLDI0_CLK0N */ + J722S_IOPAD(0x29c, PIN_OUTPUT, 0) /* (AE20) OLDI0_CLK0P */ + >; + }; + + oldi1_pins_default: oldi1-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x280, PIN_OUTPUT, 0) /* (AD21) OLDI0_A4N */ + J722S_IOPAD(0x27c, PIN_OUTPUT, 0) /* (AC21) OLDI0_A4P */ + J722S_IOPAD(0x288, PIN_OUTPUT, 0) /* (AF19) OLDI0_A5N */ + J722S_IOPAD(0x284, PIN_OUTPUT, 0) /* (AF18) OLDI0_A5P */ + J722S_IOPAD(0x290, PIN_OUTPUT, 0) /* (AG17) OLDI0_A6N */ + J722S_IOPAD(0x28c, PIN_OUTPUT, 0) /* (AG18) OLDI0_A6P */ + J722S_IOPAD(0x298, PIN_OUTPUT, 0) /* (AB19) OLDI0_A7N */ + J722S_IOPAD(0x294, PIN_OUTPUT, 0) /* (AA20) OLDI0_A7P */ + J722S_IOPAD(0x2a8, PIN_OUTPUT, 0) /* (AD20) OLDI0_CLK1N */ + J722S_IOPAD(0x2a4, PIN_OUTPUT, 0) /* (AE19) OLDI0_CLK1P */ + >; + }; + + ospi0_pins_default: ospi0-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x000, PIN_OUTPUT, 0) /* (L24) OSPI0_CLK */ + J722S_IOPAD(0x02c, PIN_OUTPUT, 0) /* (K26) OSPI0_CSn0 */ + J722S_IOPAD(0x030, PIN_OUTPUT, 0) /* (K23) OSPI0_CSn1 */ + J722S_IOPAD(0x034, PIN_OUTPUT, 0) /* (K22) OSPI0_CSn2 */ + J722S_IOPAD(0x00c, PIN_INPUT, 0) /* (K27) OSPI0_D0 */ + J722S_IOPAD(0x010, PIN_INPUT, 0) /* (L27) OSPI0_D1 */ + J722S_IOPAD(0x014, PIN_INPUT, 0) /* (L26) OSPI0_D2 */ + J722S_IOPAD(0x018, PIN_INPUT, 0) /* (L25) OSPI0_D3 */ + >; + bootph-all; + }; + + pcie0_rc_pins_default: pcie0-rc-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x2ac, PIN_OUTPUT, 0) /* (F25) PCIE0_CLKREQn */ + J722S_IOPAD(0x1b4, PIN_OUTPUT, 7) /* (B20) SPI0_CS0.GPIO1_15 */ + >; + }; + + pmic_irq_pins_default: pmic-irq-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x090, PIN_INPUT, 7) /* (P27) GPMC0_BE0n_CLE.GPIO0_35 */ + >; + }; + + rgmii1_pins_default: rgmii1-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x14c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */ + J722S_IOPAD(0x150, PIN_INPUT, 0) /* (AD27) RGMII1_RD1 */ + J722S_IOPAD(0x154, PIN_INPUT, 0) /* (AE24) RGMII1_RD2 */ + J722S_IOPAD(0x158, PIN_INPUT, 0) /* (AE26) RGMII1_RD3 */ + J722S_IOPAD(0x148, PIN_INPUT, 0) /* (AE27) RGMII1_RXC */ + J722S_IOPAD(0x144, PIN_INPUT, 0) /* (AD23) RGMII1_RX_CTL */ + J722S_IOPAD(0x134, PIN_OUTPUT, 0) /* (AF27) RGMII1_TD0 */ + J722S_IOPAD(0x138, PIN_OUTPUT, 0) /* (AE23) RGMII1_TD1 */ + J722S_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AG25) RGMII1_TD2 */ + J722S_IOPAD(0x140, PIN_OUTPUT, 0) /* (AF24) RGMII1_TD3 */ + J722S_IOPAD(0x130, PIN_OUTPUT, 0) /* (AG26) RGMII1_TXC */ + J722S_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */ + >; + }; + + rgmii2_pins_default: rgmii2-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x0f8, PIN_INPUT, 2) /* (AB24) VOUT0_HSYNC.RGMII2_RD0 */ + J722S_IOPAD(0x0fc, PIN_INPUT, 2) /* (AC27) VOUT0_DE.RGMII2_RD1 */ + J722S_IOPAD(0x100, PIN_INPUT, 2) /* (AB23) VOUT0_VSYNC.RGMII2_RD2 */ + J722S_IOPAD(0x104, PIN_INPUT, 2) /* (AC26) VOUT0_PCLK.RGMII2_RD3 */ + J722S_IOPAD(0x0f4, PIN_INPUT, 2) /* (AB27) VOUT0_DATA15.RGMII2_RXC */ + J722S_IOPAD(0x0f0, PIN_INPUT, 2) /* (AB26) VOUT0_DATA14.RGMII2_RX_CTL */ + J722S_IOPAD(0x0e0, PIN_OUTPUT, 2) /* (AA25) VOUT0_DATA10.RGMII2_TD0 */ + J722S_IOPAD(0x0e4, PIN_OUTPUT, 2) /* (AB25) VOUT0_DATA11.RGMII2_TD1 */ + J722S_IOPAD(0x0e8, PIN_OUTPUT, 2) /* (AA23) VOUT0_DATA12.RGMII2_TD2 */ + J722S_IOPAD(0x0ec, PIN_OUTPUT, 2) /* (AA22) VOUT0_DATA13.RGMII2_TD3 */ + J722S_IOPAD(0x0dc, PIN_OUTPUT, 2) /* (AA27) VOUT0_DATA9.RGMII2_TXC */ + J722S_IOPAD(0x0d8, PIN_OUTPUT, 2) /* (AA24) VOUT0_DATA8.RGMII2_TX_CTL */ + >; + }; + + rtc_pins_default: rtc-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x094, PIN_INPUT, 7) /* (P26) GPMC0_BE1n.GPIO0_36 */ + >; + }; + + sdhci1_pins_default: sdhci1-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x23c, PIN_INPUT, 0) /* (H22) MMC1_CMD */ + J722S_IOPAD(0x234, PIN_OUTPUT, 0) /* (H24) MMC1_CLK */ + J722S_IOPAD(0x230, PIN_INPUT, 0) /* (H23) MMC1_DAT0 */ + J722S_IOPAD(0x22c, PIN_INPUT, 0) /* (H20) MMC1_DAT1 */ + J722S_IOPAD(0x228, PIN_INPUT, 0) /* (J23) MMC1_DAT2 */ + J722S_IOPAD(0x224, PIN_INPUT, 0) /* (H25) MMC1_DAT3 */ + J722S_IOPAD(0x240, PIN_INPUT, 0) /* (B24) MMC1_SDCD */ + J722S_IOPAD(0x244, PIN_INPUT, 0) /* (A24) MMC1_SDWP */ + >; + bootph-all; + }; + + usb0_connector_pins_default: usb0-connector-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x08c, PIN_INPUT_PULLUP, 7) /* (N23) GPMC0_WEn.GPIO0_34 */ + >; + }; + + usb1_pins_default: usb1-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x258, PIN_OUTPUT, 0) /* (B27) USB1_DRVVBUS */ + >; + }; + + vcc_3p3_sd_s0_pins_default: vcc-3p3-sd-s0-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x01c, PIN_OUTPUT, 7) /* (L21) OSPI0_D4.GPIO0_7 */ + >; + bootph-all; + }; + + vcc_3p3_sd_vio_s0_pins_default: vcc-3p3-sd-vio-s0-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x020, PIN_OUTPUT, 7) /* (M26) OSPI0_D5.GPIO0_8 */ + >; + bootph-all; + }; + + vcc_3p3_cam_s0_pins_default: vcc-3p3-cam-s0-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x1f0, PIN_OUTPUT, 7) /* (A23) EXT_REFCLK1.GPIO1_30 */ + >; + }; + + vcc_lcd0_panel_pins_default: vcc-lcd0-panel-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x078, PIN_OUTPUT, 7) /* (V23) GPMC0_AD15.GPIO0_30 */ + >; + }; + + vcc_lcd1_panel_pins_default: vcc-lcd1-panel-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x1c4, PIN_OUTPUT, 7) /* (E20) SPI0_D1.GPIO1_19 */ + >; + }; + + vcc_usb0_vbus_pins_default: vcc-usb0-vbus-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x254, PIN_OUTPUT, 7) /* (E25) USB0_DRVVBUS.GPIO1_50 */ + >; + }; +}; + +/* SER1 */ +&main_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart0_pins_default>; + bootph-all; + status = "okay"; +}; + +/* SER2 */ +&main_uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart5_pins_default>; + bootph-all; + status = "okay"; +}; + +/* I2S0 */ +&mcasp0 { + #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&mcasp0_pins_default>; + op-mode = <0>; /* I2S */ + tdm-slots = <2>; + serial-dir = <2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0>; +}; + +/* I2S2 */ +&mcasp2 { + #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&mcasp2_pins_default>; + op-mode = <0>; /* I2S */ + tdm-slots = <2>; + serial-dir = <2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0>; +}; + +/* CAN0 */ +&mcu_mcan0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan0_pins_default>; + status = "okay"; +}; + +/* CAN1 */ +&mcu_mcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan1_pins_default>; + status = "okay"; +}; + +&mcu_gpio0 { + gpio-line-names = + "", "", "", "", "", "", "", "", "", "", "", /* 10 */ "GPIO12", + "MCU_INT#", "", "", "", "", "", "", "", "", "", "", "GPIO13"; +}; + +/* I2C_GP */ +&mcu_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_i2c0_pins_default>; + clock-frequency = <100000>; + status = "okay"; + + /* SMARC Module EEPROM */ + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + pagesize = <32>; + vcc-supply = <&vcc_1p8_s0>; + }; +}; + +&mcu_pmx0 { + mcu_i2c0_pins_default: mcu-i2c0-default-pins { + pinctrl-single,pins = < + J722S_MCU_IOPAD(0x044, PIN_INPUT, 0) /* (B13) MCU_I2C0_SCL */ + J722S_MCU_IOPAD(0x048, PIN_INPUT, 0) /* (E11) MCU_I2C0_SDA */ + >; + }; + mcu_mcan0_pins_default: mcu-mcan0-default-pins { + pinctrl-single,pins = < + J722S_MCU_IOPAD(0x038, PIN_INPUT, 0) /* (D8) MCU_MCAN0_RX */ + J722S_MCU_IOPAD(0x034, PIN_OUTPUT, 0) /* (B2) MCU_MCAN0_TX */ + >; + }; + + mcu_mcan1_pins_default: mcu-mcan1-default-pins { + pinctrl-single,pins = < + J722S_MCU_IOPAD(0x040, PIN_INPUT, 0) /* (B1) MCU_MCAN1_RX */ + J722S_MCU_IOPAD(0x03c, PIN_OUTPUT, 0) /* (C1) MCU_MCAN1_TX */ + >; + }; + + mcu_uart0_pins_default: mcu-uart0-default-pins { + pinctrl-single,pins = < + J722S_MCU_IOPAD(0x014, PIN_INPUT, 0) /* (B8) MCU_UART0_RXD */ + J722S_MCU_IOPAD(0x018, PIN_OUTPUT, 0) /* (B4) MCU_UART0_TXD */ + J722S_MCU_IOPAD(0x01c, PIN_INPUT, 0) /* (B5) MCU_UART0_CTSn */ + J722S_MCU_IOPAD(0x020, PIN_OUTPUT, 0) /* (C5) MCU_UART0_RTSn */ + >; + bootph-all; + }; + + mcu_spi0_pins_default: mcu-spi0-default-pins { + pinctrl-single,pins = < + J722S_MCU_IOPAD(0x008, PIN_OUTPUT, 0) /* (A9) MCU_SPI0_CLK */ + J722S_MCU_IOPAD(0x000, PIN_OUTPUT, 0) /* (C12) MCU_SPI0_CS0 */ + J722S_MCU_IOPAD(0x004, PIN_OUTPUT, 0) /* (A10) MCU_SPI0_CS1 */ + J722S_MCU_IOPAD(0x00c, PIN_INPUT, 0) /* (B12) MCU_SPI0_D0 */ + J722S_MCU_IOPAD(0x010, PIN_OUTPUT, 0) /* (C11) MCU_SPI0_D1 */ + >; + }; + + wkup_uart0_pins_default: wkup-uart0-default-pins { + pinctrl-single,pins = < + J722S_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B3) WKUP_UART0_RXD */ + J722S_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C8) WKUP_UART0_TXD */ + >; + bootph-all; + }; + + wkup_i2c0_pins_default: wkup-i2c0-default-pins { + pinctrl-single,pins = < + J722S_MCU_IOPAD(0x04c, PIN_INPUT, 0) /* (B9) WKUP_I2C0_SCL */ + J722S_MCU_IOPAD(0x050, PIN_INPUT, 0) /* (D11) WKUP_I2C0_SDA */ + >; + }; +}; + +/* SPI0 */ +&mcu_spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_spi0_pins_default>; +}; + +/* SER0 */ +&mcu_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_uart0_pins_default>; + bootph-all; + status = "okay"; +}; + +/* QSPI0 */ +&ospi0 { + pinctrl-0 = <&ospi0_pins_default>; + pinctrl-names = "default"; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <104000000>; + spi-rx-bus-width = <2>; + spi-tx-bus-width = <2>; + m25p,fast-read; + cdns,tshsl-ns = <60>; + cdns,tsd2d-ns = <60>; + cdns,tchsh-ns = <60>; + cdns,tslch-ns = <60>; + cdns,read-delay = <3>; + vcc-supply = <&vcc_1p8_s0>; + bootph-all; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + reg = <0x000000 0x400000>; + label = "failsafe bootloader"; + read-only; + }; + }; + + otp-1 { + compatible = "user-otp"; + + nvmem-layout { + compatible = "kontron,sa67-vpd", "kontron,sl28-vpd"; + + serial_number: serial-number { + }; + + base_mac_address: base-mac-address { + #nvmem-cell-cells = <1>; + }; + }; + }; + }; +}; + +&pcie0_rc { + pinctrl-names = "default"; + pinctrl-0 = <&pcie0_rc_pins_default>; + + /* + * This is low active, but the driver itself is broken and already + * inverts the logic. + */ + reset-gpios = <&main_gpio1 15 GPIO_ACTIVE_HIGH>; + phys = <&serdes1_pcie>; + phy-names = "pcie-phy"; + status = "okay"; +}; + +&sdhci0 { + disable-wp; + bootph-all; + ti,driver-strength-ohm = <50>; + status = "okay"; +}; + +/* SDIO */ +&sdhci1 { + pinctrl-names = "default"; + pinctrl-0 = <&sdhci1_pins_default>; + vmmc-supply = <&vcc_3p3_sd_s0>; + vqmmc-supply = <&vcc_3p3_sd_vio_s0>; + bootph-all; + cd-gpios = <&main_gpio1 48 GPIO_ACTIVE_LOW>; + cd-debounce-delay-ms = <100>; + ti,fails-without-test-cd; + ti,driver-strength-ohm = <50>; + status = "okay"; +}; + +&serdes_ln_ctrl { + idle-states = <J722S_SERDES0_LANE0_USB>, + <J722S_SERDES1_LANE0_PCIE0_LANE0>; +}; + +&serdes_wiz0 { + status = "okay"; +}; + +&serdes_wiz1 { + status = "okay"; +}; + +&serdes0 { + serdes0_usb3: phy@0 { + reg = <0>; + #phy-cells = <0>; + resets = <&serdes_wiz0 1>; + cdns,num-lanes = <1>; + cdns,phy-type = <PHY_TYPE_USB3>; + }; +}; + +&serdes1 { + serdes1_pcie: phy@0 { + reg = <0>; + #phy-cells = <0>; + resets = <&serdes_wiz1 1>; + cdns,num-lanes = <1>; + cdns,phy-type = <PHY_TYPE_PCIE>; + }; +}; + +&usb0 { + /* dual role is implemented but not a full featured OTG */ + adp-disable; + hnp-disable; + srp-disable; + dr_mode = "otg"; + usb-role-switch; + role-switch-default-mode = "peripheral"; + status = "okay"; + + port { + usb0_hc: endpoint { + remote-endpoint = <&usb0_connector>; + }; + }; +}; + +&usb0_phy_ctrl { + /* + * Keep this node in the SPL to be able to use the USB controller to + * boot via DFU. + */ + bootph-all; +}; + +&usb1 { + pinctrl-names = "default"; + pinctrl-0 = <&usb1_pins_default>; + + dr_mode = "host"; + maximum-speed = "super-speed"; + phys = <&serdes0_usb3>; + phy-names = "cdns3,usb3-phy"; +}; + +&usbss0 { + ti,vbus-divider; + status = "okay"; +}; + +&usbss1 { + ti,vbus-divider; + status = "okay"; +}; + +/* I2C_PM */ +&wkup_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&wkup_i2c0_pins_default>; + clock-frequency = <100000>; + status = "okay"; +}; + +/* SER3 */ +&wkup_uart0 { + /* WKUP UART0 is used by Device Manager firmware */ + pinctrl-names = "default"; + pinctrl-0 = <&wkup_uart0_pins_default>; + bootph-all; + status = "reserved"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gbe1.dtso b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gbe1.dtso new file mode 100644 index 000000000000..5dfb0b8f10d2 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gbe1.dtso @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Second ethernet port GBE1. + * + * Copyright (c) 2025 Kontron Europe GmbH + */ + +/dts-v1/; +/plugin/; + +&cpsw3g_mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +&cpsw_port2 { + phy-connection-type = "rgmii-id"; + phy-handle = <&phy1>; + nvmem-cells = <&base_mac_address 1>; + nvmem-cell-names = "mac-address"; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gpios.dtso b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gpios.dtso new file mode 100644 index 000000000000..a6ae758e0b3a --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gpios.dtso @@ -0,0 +1,61 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * SMARC GPIOs. + * + * Copyright (c) 2025 Kontron Europe GmbH + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/gpio/gpio.h> +#include "k3-pinctrl.h" + +&main_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_gpio0_pins_default>; +}; + +&main_gpio1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_gpio1_pins_default>; +}; + +&main_pmx0 { + main_gpio0_pins_default: main-gpio0-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x0d0, PIN_INPUT, 7) /* (Y26) VOUT0_DATA6.GPIO0_51 */ + J722S_IOPAD(0x0d4, PIN_INPUT, 7) /* (Y27) VOUT0_DATA7.GPIO0_52 */ + J722S_IOPAD(0x118, PIN_INPUT, 7) /* (H26) MMC2_CLK.GPIO0_69 */ + J722S_IOPAD(0x120, PIN_INPUT, 7) /* (F27) MMC2_CMD.GPIO0_70 */ + >; + }; + + main_gpio1_pins_default: main-gpio1-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x194, PIN_INPUT, 7) /* (A25) MCASP0_AXR3.GPIO1_7 */ + J722S_IOPAD(0x198, PIN_INPUT, 7) /* (A26) MCASP0_AXR2.GPIO1_8 */ + J722S_IOPAD(0x1ac, PIN_INPUT, 7) /* (C27) MCASP0_AFSR.GPIO1_13 */ + J722S_IOPAD(0x1b0, PIN_INPUT, 7) /* (F24) MCASP0_ACLKR.GPIO1_14 */ + J722S_IOPAD(0x1d8, PIN_INPUT, 7) /* (D22) MCAN0_TX.GPIO1_24 */ + J722S_IOPAD(0x1dc, PIN_INPUT, 7) /* (C22) MCAN0_RX.GPIO1_25 */ + J722S_IOPAD(0x1e8, PIN_INPUT, 7) /* (C24) I2C1_SCL.GPIO1_28 */ + J722S_IOPAD(0x1ec, PIN_INPUT, 7) /* (A22) I2C1_SDA.GPIO1_29 */ + >; + }; +}; + +&mcu_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_gpio0_pins_default>; +}; + +&mcu_pmx0 { + mcu_gpio0_pins_default: mcu-gpio0-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x02c, PIN_INPUT, 7) /* (C4) WKUP_UART0_CTSn.MCU_GPIO0_11 */ + J722S_IOPAD(0x084, PIN_INPUT, 7) /* (F12) WKUP_CLKOUT0.MCU_GPIO0_23 */ + >; + }; + +}; diff --git a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-rtc-rv8263.dtso b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-rtc-rv8263.dtso new file mode 100644 index 000000000000..0a3e9f614c4c --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-rtc-rv8263.dtso @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Microcrystal RV8263 RTC variant. + * + * Copyright (c) 2025 Kontron Europe GmbH + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/irq.h> + +&{/} { + aliases { + rtc0 = "/bus@f0000/i2c@20000000/rtc@51"; /* &rtc */ + rtc1 = "/bus@f0000/bus@b00000/rtc@2b1f0000"; /* &wkup_rtc0 */ + }; +}; + +&main_i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + rtc: rtc@51 { + compatible = "microcrystal,rv8263"; + reg = <0x51>; + pinctrl-names = "default"; + pinctrl-0 = <&rtc_pins_default>; + interrupts-extended = <&main_gpio0 36 IRQ_TYPE_EDGE_FALLING>; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts b/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts index 41c8f8526e15..e221ccb30e95 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts +++ b/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts @@ -281,7 +281,7 @@ }; &cpsw_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&phy0>; }; @@ -422,6 +422,7 @@ &mcu_cpsw { pinctrl-names = "default"; pinctrl-0 = <&mcu_cpsw_pins_default>; + status = "okay"; }; &mcu_i2c1 { diff --git a/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi index adef02bd8040..0ff511028f81 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi @@ -175,7 +175,7 @@ &main_cpsw_port1 { phy-handle = <&phy1>; - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; status = "okay"; }; @@ -258,7 +258,7 @@ bootph-pre-ram; }; - pmic@48 { + pmic: pmic@48 { compatible = "ti,tps6594-q1"; reg = <0x48>; system-power-controller; diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts index 75a107456ce1..88f202f266c6 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts @@ -692,6 +692,7 @@ &mcu_cpsw { pinctrl-names = "default"; pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>; + status = "okay"; }; &davinci_mdio { @@ -705,7 +706,7 @@ }; &cpsw_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&phy0>; bootph-all; }; diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts b/arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts new file mode 100644 index 000000000000..55fd214a82e4 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts @@ -0,0 +1,451 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (C) 2025 Toradex + * + * https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 + * https://www.toradex.com/products/carrier-board/clover + */ + +/dts-v1/; + +#include <dt-bindings/pwm/pwm.h> +#include "k3-am69-aquila.dtsi" + +/ { + model = "Toradex Aquila AM69 on Clover Board"; + compatible = "toradex,aquila-am69-clover", + "toradex,aquila-am69", + "ti,j784s4"; + + aliases { + eeprom1 = &carrier_eeprom; + }; + + reg_3v3_dp: regulator-3v3-dp { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_21_dp>; + /* Aquila GPIO_21_DP (AQUILA B57) */ + gpio = <&main_gpio0 37 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "DP_3V3"; + startup-delay-us = <10000>; + }; + + /* Aquila DP_1 */ + dp-connector { + compatible = "dp-connector"; + dp-pwr-supply = <®_3v3_dp>; + label = "Display Port"; + type = "full-size"; + + port { + dp_connector_in: endpoint { + remote-endpoint = <&dp0_out>; + }; + }; + }; +}; + +/* On-module ETH_1 MDIO */ +&davinci_mdio { + status = "okay"; +}; + +&dp0_ports { + port@4 { + reg = <4>; + dp0_out: endpoint { + remote-endpoint = <&dp_connector_in>; + }; + }; +}; + +&dss { + status = "okay"; +}; + +&main0_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main0_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main0_alert1>; + }; + }; +}; + +&main1_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main1_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main1_alert1>; + }; + }; +}; + +&main2_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main2_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main2_alert1>; + }; + }; +}; + +&main3_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main3_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main3_alert1>; + }; + }; +}; + +&main4_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main4_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main4_alert1>; + }; + }; +}; + +/* Aquila ETH_2 */ +&main_cpsw0 { + status = "okay"; +}; + +/* Aquila ETH_2 SGMII PHY */ +&main_cpsw0_port8 { + phy-handle = <&cpsw0_port8_phy4>; + status = "okay"; +}; + +/* Aquila ETH_2_XGMII_MDIO */ +&main_cpsw0_mdio { + status = "okay"; + + cpsw0_port8_phy4: ethernet-phy@4 { + reg = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eth2_int>; + interrupt-parent = <&main_gpio0>; + interrupts = <44 IRQ_TYPE_EDGE_FALLING>; + }; +}; + +/* Aquila PWM_1 */ +&main_ehrpwm0 { + status = "okay"; +}; + +/* Aquila PWM_2 */ +&main_ehrpwm1 { + status = "okay"; +}; + +&main_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_01>, /* Aquila GPIO_01 */ + <&pinctrl_gpio_02>, /* Aquila GPIO_02 */ + <&pinctrl_gpio_03>; /* Aquila GPIO_03 */ +}; + +/* Aquila I2C_6 */ +&main_i2c5 { + status = "okay"; +}; + +/* Aquila CAN_1 */ +&main_mcan10 { + status = "okay"; +}; + +/* Aquila CAN_3 */ +&main_mcan13 { + status = "okay"; +}; + +/* Aquila SD_1 */ +&main_sdhci1 { + status = "okay"; +}; + +/* Aquila SPI_2 */ +&main_spi0 { + status = "okay"; +}; + +/* Aquila SPI_1 */ +&main_spi2 { + pinctrl-0 = <&pinctrl_main_spi2>, + <&pinctrl_main_spi2_cs0>, + <&pinctrl_gpio_05>; + cs-gpios = <0>, <&wkup_gpio0 29 GPIO_ACTIVE_LOW>; + status = "okay"; + + tpm@1 { + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; + reg = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_06>; + interrupt-parent = <&wkup_gpio0>; + interrupts = <30 IRQ_TYPE_EDGE_FALLING>; + spi-max-frequency = <18500000>; + }; +}; + +/* Aquila UART_1 */ +&main_uart4 { + status = "okay"; +}; + +/* Aquila UART_3, used as the Linux console */ +&main_uart8 { + status = "okay"; +}; + +&mcu_cpsw { + status = "okay"; +}; + +/* On-module ETH_1 RGMII */ +&mcu_cpsw_port1 { + status = "okay"; +}; + +/* Aquila I2C_1 */ +&mcu_i2c0 { + clock-frequency = <100000>; + status = "okay"; + + fan_controller: fan@18 { + compatible = "ti,amc6821"; + reg = <0x18>; + #pwm-cells = <2>; + + fan: fan { + cooling-levels = <102 179 255>; + #cooling-cells = <2>; + pwms = <&fan_controller 40000 PWM_POLARITY_INVERTED>; + }; + }; + + temperature-sensor@4f { + compatible = "ti,tmp1075"; + reg = <0x4f>; + }; + + /* USB-C OTG (TCPC USB PD PHY) */ + tcpc@52 { + compatible = "nxp,ptn5110", "tcpci"; + reg = <0x52>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1_int>; + interrupt-parent = <&main_gpio0>; + interrupts = <28 IRQ_TYPE_EDGE_FALLING>; + + connector { + compatible = "usb-c-connector"; + data-role = "dual"; + label = "USB-C OTG"; + power-role = "dual"; + try-power-role = "sink"; + self-powered; + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; + op-sink-microwatt = <1000000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_1_con_hs: endpoint { + remote-endpoint = <&usb0_hs>; + }; + }; + + port@1 { + reg = <1>; + + usb_1_con_ss: endpoint { + remote-endpoint = <&usb0_ss_mux>; + }; + }; + }; + }; + }; + + carrier_eeprom: eeprom@57 { + compatible = "st,24c02", "atmel,24c02"; + reg = <0x57>; + pagesize = <16>; + }; +}; + +/* Aquila I2C_2 */ +&mcu_i2c1 { + status = "okay"; +}; + +/* Aquila CAN_2 */ +&mcu_mcan0 { + status = "okay"; +}; + +/* Aquila CAN_4 */ +&mcu_mcan1 { + status = "okay"; +}; + +/* Aquila UART_4 */ +&mcu_uart0 { + status = "okay"; +}; + +&mhdp { + status = "okay"; +}; + +/* Aquila QSPI_1 */ +&ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_ospi0_4bit>, <&pinctrl_mcu_ospi0_cs0>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <66000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + cdns,read-delay = <0>; + cdns,tchsh-ns = <3>; + cdns,tsd2d-ns = <10>; + cdns,tshsl-ns = <30>; + cdns,tslch-ns = <8>; + }; +}; + +/* Aquila PCIE_1 */ +&pcie0_rc { + status = "okay"; +}; + +/* Aquila PCIE_2 */ +&pcie1_rc { + status = "okay"; +}; + +&serdes2 { + status = "okay"; +}; + +&serdes4 { + status = "okay"; +}; + +&serdes_wiz2 { + status = "okay"; +}; + +&serdes_wiz4 { + status = "okay"; +}; + +/* Aquila ADC_[1-4] */ +&tscadc0 { + status = "okay"; +}; + +&usbss0 { + status = "okay"; +}; + +&usb0ss_mux { + status = "okay"; + + port { + usb0_ss_mux: endpoint { + remote-endpoint = <&usb_1_con_ss>; + }; + }; +}; + +&usb0 { + status = "okay"; + + port { + usb0_hs: endpoint { + remote-endpoint = <&usb_1_con_hs>; + }; + }; +}; + +&wkup0_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&wkup0_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&wkup0_alert1>; + }; + }; +}; + +&wkup1_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&wkup1_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&wkup1_alert1>; + }; + }; +}; + +&wkup_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_04>; /* Aquila GPIO_04 */ +}; + +/* Aquila UART_2 */ +&wkup_uart0 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts b/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts new file mode 100644 index 000000000000..c7ce804eac70 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts @@ -0,0 +1,576 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (C) 2025 Toradex + * + * https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 + * https://www.toradex.com/products/carrier-board/aquila-development-board-kit + */ + +/dts-v1/; + +#include <dt-bindings/pwm/pwm.h> +#include "k3-am69-aquila.dtsi" + +/ { + model = "Toradex Aquila AM69 on Aquila Development Board"; + compatible = "toradex,aquila-am69-dev", + "toradex,aquila-am69", + "ti,j784s4"; + + aliases { + eeprom1 = &carrier_eeprom; + }; + + reg_1v8_sw: regulator-1v8-sw { + compatible = "regulator-fixed"; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "Carrier_1V8"; + }; + + reg_3v3_dp: regulator-3v3-dp { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_21_dp>; + /* Aquila GPIO_21_DP (AQUILA B57) */ + gpio = <&main_gpio0 37 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "DP_3V3"; + startup-delay-us = <10000>; + }; + + dp0-connector { + compatible = "dp-connector"; + dp-pwr-supply = <®_3v3_dp>; + label = "Display Port"; + type = "full-size"; + + port { + dp0_connector_in: endpoint { + remote-endpoint = <&dp0_out>; + }; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,bitclock-master = <&codec_dai>; + simple-audio-card,format = "i2s"; + simple-audio-card,frame-master = <&codec_dai>; + simple-audio-card,name = "aquila-wm8904"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,routing = + "Headphone Jack", "HPOUTL", + "Headphone Jack", "HPOUTR", + "IN2L", "Line In Jack", + "IN2R", "Line In Jack", + "Microphone Jack", "MICBIAS", + "IN1L", "Microphone Jack", + "IN1R", "Digital Mic"; + simple-audio-card,widgets = + "Microphone", "Microphone Jack", + "Microphone", "Digital Mic", + "Headphone", "Headphone Jack", + "Line", "Line In Jack"; + + codec_dai: simple-audio-card,codec { + sound-dai = <&wm8904_1a>; + }; + + simple-audio-card,cpu { + sound-dai = <&mcasp4>; + }; + }; +}; + +/* Aquila CTRL_PWR_BTN_MICO# */ +&aquila_key_power { + status = "okay"; +}; + +/* Aquila CTRL_WAKE1_MICO# */ +&aquila_key_wake { + status = "okay"; +}; + +/* On-module ETH_1 MDIO */ +&davinci_mdio { + status = "okay"; +}; + +&dp0_ports { + port@4 { + reg = <4>; + dp0_out: endpoint { + remote-endpoint = <&dp0_connector_in>; + }; + }; +}; + +&dss { + status = "okay"; +}; + +&main0_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main0_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main0_alert1>; + }; + }; +}; + +&main1_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main1_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main1_alert1>; + }; + }; +}; + +&main2_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main2_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main2_alert1>; + }; + }; +}; + +&main3_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main3_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main3_alert1>; + }; + }; +}; + +&main4_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main4_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main4_alert1>; + }; + }; +}; + +/* Aquila ETH_2 */ +&main_cpsw0 { + status = "okay"; +}; + +/* Aquila ETH_2 SGMII PHY */ +&main_cpsw0_port8 { + phy-handle = <&cpsw0_port8_phy4>; + status = "okay"; +}; + +/* Aquila ETH_2_XGMII_MDIO */ +&main_cpsw0_mdio { + status = "okay"; + + cpsw0_port8_phy4: ethernet-phy@4 { + reg = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eth2_int>; + interrupt-parent = <&main_gpio0>; + interrupts = <44 IRQ_TYPE_EDGE_FALLING>; + }; +}; + +/* Aquila PWM_1 */ +&main_ehrpwm0 { + status = "okay"; +}; + +/* Aquila PWM_4_DP */ +&main_ehrpwm2 { + status = "okay"; +}; + +/* Aquila PWM_2 */ +&main_ehrpwm1 { + status = "okay"; +}; + +/* Aquila PWM_3_DSI */ +&main_ehrpwm5 { + status = "okay"; +}; + +&main_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_01>, /* Aquila GPIO_01 */ + <&pinctrl_gpio_02>, /* Aquila GPIO_02 */ + <&pinctrl_gpio_03>; /* Aquila GPIO_03 */ +}; + +/* Aquila I2C_3_DSI1 */ +&main_i2c0 { + status = "okay"; + + i2c-mux@70 { + compatible = "nxp,pca9543"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + /* I2C on DSI Connector Pin #4 and #6 */ + i2c_dsi_0: i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + /* I2C on DSI Connector Pin #52 and #54 */ + i2c_dsi_1: i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +/* Aquila I2C_4_CSI1 */ +&main_i2c1 { + status = "okay"; +}; + +/* Aquila I2C_5_CSI2 */ +&main_i2c2 { + status = "okay"; +}; + +/* Aquila I2C_6 */ +&main_i2c5 { + status = "okay"; +}; + +/* Aquila CAN_1 */ +&main_mcan10 { + status = "okay"; +}; + +/* Aquila CAN_3 */ +&main_mcan13 { + status = "okay"; +}; + +/* Aquila SD_1 */ +&main_sdhci1 { + status = "okay"; +}; + +/* Aquila SPI_2 */ +&main_spi0 { + status = "okay"; +}; + +/* Aquila SPI_1 */ +&main_spi2 { + status = "okay"; +}; + +/* Aquila UART_1 */ +&main_uart4 { + status = "okay"; +}; + +/* Aquila UART_3, used as the Linux console */ +&main_uart8 { + status = "okay"; +}; + +/* Aquila I2S_1 */ +&mcasp4 { + status = "okay"; +}; + +&mcu_cpsw { + status = "okay"; +}; + +/* On-module ETH_1 RGMII */ +&mcu_cpsw_port1 { + status = "okay"; +}; + +/* Aquila I2C_1 */ +&mcu_i2c0 { + clock-frequency = <100000>; + status = "okay"; + + fan_controller: fan@18 { + compatible = "ti,amc6821"; + reg = <0x18>; + #pwm-cells = <2>; + + fan: fan { + cooling-levels = <102 179 255>; + #cooling-cells = <2>; + pwms = <&fan_controller 40000 PWM_POLARITY_INVERTED>; + }; + }; + + wm8904_1a: audio-codec@1a { + compatible = "wlf,wm8904"; + reg = <0x1a>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audio_extrefclk1>; + #sound-dai-cells = <0>; + clocks = <&audio_refclk1>; + clock-names = "mclk"; + AVDD-supply = <®_1v8_sw>; + CPVDD-supply = <®_1v8_sw>; + DBVDD-supply = <®_1v8_sw>; + DCVDD-supply = <®_1v8_sw>; + MICVDD-supply = <®_1v8_sw>; + + wlf,drc-cfg-names = "default", "peaklimiter"; + /* + * Config registers per name, respectively: + * KNEE_IP = 0, KNEE_OP = 0, HI_COMP = 1, LO_COMP = 1 + * KNEE_IP = -24, KNEE_OP = -6, HI_COMP = 1/4, LO_COMP = 1 + */ + wlf,drc-cfg-regs = /bits/ 16 <0x01af 0x3248 0x0000 0x0000>, + /bits/ 16 <0x04af 0x324b 0x0010 0x0408>; + + /* GPIO1 = DMIC_CLK, don't touch others */ + wlf,gpio-cfg = <0x0018>, <0xffff>, <0xffff>, <0xffff>; + + wlf,in1r-as-dmicdat2; + }; + + /* Current measurement into module VCC */ + hwmon@41 { + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <5000>; + }; + + temperature-sensor@4f { + compatible = "ti,tmp1075"; + reg = <0x4f>; + }; + + /* USB-C OTG (TCPC USB PD PHY) */ + tcpc@52 { + compatible = "nxp,ptn5110", "tcpci"; + reg = <0x52>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1_int>; + interrupt-parent = <&main_gpio0>; + interrupts = <28 IRQ_TYPE_EDGE_FALLING>; + + connector { + compatible = "usb-c-connector"; + data-role = "dual"; + label = "USB-C OTG"; + power-role = "dual"; + try-power-role = "sink"; + self-powered; + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; + op-sink-microwatt = <1000000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_1_con_hs: endpoint { + remote-endpoint = <&usb0_hs>; + }; + }; + + port@1 { + reg = <1>; + + usb_1_con_ss: endpoint { + remote-endpoint = <&usb0_ss_mux>; + }; + }; + }; + }; + }; + + carrier_eeprom: eeprom@57 { + compatible = "st,24c02", "atmel,24c02"; + reg = <0x57>; + pagesize = <16>; + }; +}; + +/* Aquila I2C_2 */ +&mcu_i2c1 { + status = "okay"; +}; + +/* Aquila CAN_2 */ +&mcu_mcan0 { + status = "okay"; +}; + +/* Aquila CAN_4 */ +&mcu_mcan1 { + status = "okay"; +}; + +/* Aquila UART_4 */ +&mcu_uart0 { + status = "okay"; +}; + +&mhdp { + status = "okay"; +}; + +/* Aquila QSPI_1 */ +&ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_ospi0_4bit>, <&pinctrl_mcu_ospi0_cs0>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-max-frequency = <66000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + cdns,read-delay = <0>; + cdns,tchsh-ns = <3>; + cdns,tsd2d-ns = <10>; + cdns,tshsl-ns = <30>; + cdns,tslch-ns = <8>; + }; +}; + +/* Aquila PCIE_1 */ +&pcie0_rc { + status = "okay"; +}; + +/* Aquila PCIE_2 */ +&pcie1_rc { + status = "okay"; +}; + +&serdes2 { + status = "okay"; +}; + +&serdes4 { + status = "okay"; +}; + +&serdes_wiz2 { + status = "okay"; +}; + +&serdes_wiz4 { + status = "okay"; +}; + +/* Aquila ADC_[1-4] */ +&tscadc0 { + status = "okay"; +}; + +&usbss0 { + status = "okay"; +}; + +&usb0ss_mux { + status = "okay"; + + port { + usb0_ss_mux: endpoint { + remote-endpoint = <&usb_1_con_ss>; + }; + }; +}; + +&usb0 { + status = "okay"; + + port { + usb0_hs: endpoint { + remote-endpoint = <&usb_1_con_hs>; + }; + }; +}; + +&wkup0_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&wkup0_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&wkup0_alert1>; + }; + }; +}; + +&wkup1_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&wkup1_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&wkup1_alert1>; + }; + }; +}; + +&wkup_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_04>, /* Aquila GPIO_04 */ + <&pinctrl_gpio_05>, /* Aquila GPIO_05 */ + <&pinctrl_gpio_06>, /* Aquila GPIO_06 */ + <&pinctrl_gpio_07>, /* Aquila GPIO_07 */ + <&pinctrl_gpio_08>; /* Aquila GPIO_08 */ +}; + +/* Aquila UART_2, through RS485 transceiver */ +&wkup_uart0 { + linux,rs485-enabled-at-boot-time; + rs485-rx-during-tx; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi b/arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi new file mode 100644 index 000000000000..0866eb8a6f34 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi @@ -0,0 +1,1840 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (C) 2025 Toradex + * + * https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/net/ti-dp83867.h> +#include <dt-bindings/phy/phy-cadence.h> +#include <dt-bindings/usb/pd.h> +#include "k3-j784s4.dtsi" + +/ { + chosen { + stdout-path = "serial2:115200n8"; + }; + + aliases { + can0 = &main_mcan10; + can1 = &mcu_mcan0; + can2 = &main_mcan13; + can3 = &mcu_mcan1; + eeprom0 = &som_eeprom; + ethernet0 = &mcu_cpsw_port1; + ethernet1 = &main_cpsw0_port8; + i2c0 = &wkup_i2c0; + i2c1 = &mcu_i2c0; + i2c2 = &mcu_i2c1; + i2c3 = &main_i2c0; + i2c4 = &main_i2c1; + i2c5 = &main_i2c2; + i2c6 = &main_i2c5; + mmc0 = &main_sdhci0; + mmc1 = &main_sdhci1; + rtc0 = &rtc_i2c; + serial0 = &main_uart4; + serial1 = &wkup_uart0; + serial2 = &main_uart8; + serial3 = &mcu_uart0; + usb0 = &usb0; + }; + + aquila_key_power: gpio-key-power { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwr_btn_int>; + status = "disabled"; + + key-power { + /* Aquila CTRL_PWR_BTN_MICO# (AQUILA B93) */ + gpios = <&wkup_gpio0 36 GPIO_ACTIVE_LOW>; + label = "Power Button"; + linux,code = <KEY_POWER>; + }; + }; + + aquila_key_wake: gpio-key-wakeup { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ctrl_wake1_mico>; + status = "disabled"; + + key-wakeup { + /* Aquila CTRL_WAKE1_MICO# (AQUILA D6) */ + gpios = <&wkup_gpio0 49 GPIO_ACTIVE_LOW>; + label = "Wake Up"; + linux,code = <KEY_WAKEUP>; + wakeup-source; + }; + }; + + /* Aquila CTRL_RESET_MICO# (AQUILA B92) */ + gpio-restart { + compatible = "gpio-restart"; + /* COLD_RESET_REQ */ + gpios = <&som_gpio_expander 1 GPIO_ACTIVE_HIGH>; + priority = <192>; + }; + + /* PWR_DOWN_REQ */ + gpio-poweroff { + compatible = "gpio-poweroff"; + /* PWR_DOWN_REQ */ + gpios = <&som_gpio_expander 2 GPIO_ACTIVE_HIGH>; + timeout-ms = <3000>; + }; + + memory@80000000 { + device_type = "memory"; + /* 32G RAM */ + reg = <0x00 0x80000000 0x00 0x80000000>, + <0x08 0x80000000 0x07 0x80000000>; + }; + + reserved_memory: reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secure_ddr: optee@9e800000 { + reg = <0x00 0x9e800000 0x00 0x01800000>; + no-map; + }; + + mcu_r5fss0_core0_dma_memory_region: memory@a0000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa0000000 0x00 0x100000>; + no-map; + }; + + mcu_r5fss0_core0_memory_region: memory@a0100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa0100000 0x00 0xf00000>; + no-map; + }; + }; + + /* Module Power Supply (VCC) */ + reg_vin: regulator-vin { + compatible = "regulator-fixed"; + regulator-name = "+V_IN"; + }; + + /* Enabled by EN_3V3_VIO (PMIC_GPIO_9) */ + reg_1v1_usb_bridge: regulator-1v1-vio { + compatible = "regulator-fixed"; + regulator-max-microvolt = <1100000>; + regulator-min-microvolt = <1100000>; + regulator-name = "+V1.1_VIO"; + vin-supply = <®_vin>; + }; + + reg_3v3_wifi: regulator-3v3-wifi { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_en_3v3_wifi>; + gpio = <&wkup_gpio0 57 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3_WIFI"; + startup-delay-us = <20000>; + vin-supply = <®_vin>; + }; + + reg_1v8_stby: regulator-1v8-stby { + compatible = "regulator-fixed"; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "+V1.8_STBY"; + vin-supply = <®_vin>; + }; + + /* Aquila SD_1_PWR_EN */ + reg_sdhc1_vmmc: regulator-sdhci1 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sd1_pwr_en>; + /* Aquila SD_1_PWR_EN (AQUILA A6) */ + gpio = <&main_gpio0 52 GPIO_ACTIVE_HIGH>; + enable-active-high; + off-on-delay-us = <100000>; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+3V3_SD"; + startup-delay-us = <20000>; + }; + + reg_sdhc1_vqmmc: regulator-sdhci1-vqmmc { + compatible = "regulator-gpio"; + /* SDIO_PWR_SEL_3.3V */ + gpios = <&som_gpio_expander 7 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; + regulator-name = "+VDD_SD_DV"; + states = <1800000 0x0>, + <3300000 0x1>; + }; + + /* On-module USB_1_SS mux */ + usb0ss_mux: gpio-sbu-mux { + compatible = "ti,tmuxhs4212", "gpio-sbu-mux"; + orientation-switch; + /* USB_MUX_SEL */ + select-gpios = <&som_gpio_expander 0 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; +}; + +&main_pmx0 { + /* Aquila DP_1_HPD */ + pinctrl_main_dp0_hpd: main-dp0-hpd-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x014, PIN_INPUT, 13) /* (AG33) MCAN14_TX.DP0_HPD */ /* AQUILA B59 */ + >; + }; + + /* Aquila PWM_1 */ + pinctrl_main_ehrpwm0_b: main-ehrpwm0b-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x064, PIN_OUTPUT, 9) /* (AF38) MCAN0_TX.EHRPWM0_B */ /* AQUILA C25 */ + >; + }; + + /* Aquila PWM_2 */ + pinctrl_main_ehrpwm1_a: main-ehrpwm1a-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x060, PIN_OUTPUT, 9) /* (AE36) MCASP2_AXR1.EHRPWM1_A */ /* AQUILA C26 */ + >; + }; + + /* Aquila PWM_3_DSI */ + pinctrl_main_ehrpwm5_a: main-ehrpwm5a-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x084, PIN_OUTPUT, 9) /* (AG38) MCASP0_AXR5.EHRPWM5_A */ /* AQUILA B46 */ + >; + }; + + /* Aquila PWM_4_DP */ + pinctrl_main_ehrpwm2_a: main-ehrpwm2a-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x040, PIN_INPUT, 9) /* (AF37) MCASP0_AXR0.EHRPWM2_A */ /* AQUILA B58 */ + >; + }; + + /* PMIC_INT# */ + pinctrl_pmic_int: main-gpio0-0-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x000, PIN_INPUT, 7) /* (AN35) EXTINTn.GPIO0_0 */ + >; + }; + + /* Aquila GPIO_09_CSI_1 */ + pinctrl_gpio_09_csi_1: main-gpio0-1-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x004, PIN_INPUT, 7) /* (AG36) MCAN12_TX.GPIO0_1 */ /* AQUILA B17 */ + >; + }; + + /* Aquila GPIO_10_CSI_1 */ + pinctrl_gpio_10_csi_1: main-gpio0-2-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x008, PIN_INPUT, 7) /* (AJ33) MCAN12_RX.GPIO0_2 */ /* AQUILA B18 */ + >; + }; + + /* Aquila USB_1_OC# */ + pinctrl_usb1_oc: main-gpio0-10-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x028, PIN_INPUT, 7) /* (AE33) MCAN16_RX.GPIO0_10 */ /* AQUILA B75 */ + >; + }; + + /* Aquila USB_1_EN */ + pinctrl_usb1_en_gpio: main-gpio0-11-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x02c, PIN_INPUT, 7) /* (AL32) GPIO0_11 */ /* AQUILA B77 */ + >; + }; + + /* Aquila GPIO_17_DSI_1 */ + pinctrl_gpio_17_dsi_1: main-gpio0-12-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x030, PIN_INPUT, 7) /* (AK37) GPIO0_12 */ /* AQUILA B42 */ + >; + }; + + /* Aquila GPIO_19_DSI_1 */ + pinctrl_gpio_19_dsi_1: main-gpio0-13-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x034, PIN_INPUT, 7) /* (AJ34) PMIC_WAKE0n.GPIO0_13 */ /* AQUILA B44 */ + >; + }; + + /* Aquila GPIO_02 */ + pinctrl_gpio_02: main-gpio0-17-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x044, PIN_INPUT, 7) /* (AG37) MCASP0_AXR1.GPIO0_17 */ /* AQUILA D24 */ + >; + }; + + /* Aquila GPIO_20_DSI_1 */ + pinctrl_gpio_20_dsi_1: main-gpio0-18-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x048, PIN_INPUT, 7) /* (AK33) MCASP0_AXR2.GPIO0_18 */ /* AQUILA B45 */ + >; + }; + + /* Aquila GPIO_21_DP */ + pinctrl_gpio_21_dp: main-gpio0-21-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x054, PIN_INPUT, 7) /* (AD37) MCASP2_ACLKX.GPIO0_21 */ /* AQUILA B57 */ + >; + }; + + /* Aquila USB_1_INT# */ + pinctrl_usb1_int: main-gpio0-28-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x070, PIN_INPUT, 7) /* (AH38) MCAN1_RX.GPIO0_28 */ /* AQUILA B74 */ + >; + }; + + /* Aquila GPIO_03 */ + pinctrl_gpio_03: main-gpio0-29-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x074, PIN_INPUT, 7) /* (AC33) MCAN2_TX.GPIO0_29 */ /* AQUILA D25 */ + >; + }; + + /* Aquila GPIO_18_DSI_1 */ + pinctrl_gpio_18_dsi_1: main-gpio0-31-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x07c, PIN_INPUT, 7) /* (AJ38) MCASP0_AXR3.GPIO0_31 */ /* AQUILA B43 */ + >; + }; + + /* Aquila PCIE_1_RESET# */ + pinctrl_pcie0_reset: main-gpio0-32-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x080, PIN_INPUT, 7) /* (AK34) MCASP0_AXR4.GPIO0_32 */ /* AQUILA C38 */ + >; + }; + + /* Aquila PWM_3_DSI as GPIO */ + pinctrl_pwm3_dsi_gpio: main-gpio0-33-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x084, PIN_INPUT, 7) /* (AG38) MCASP0_AXR5.GPIO0_33 */ /* AQUILA B46 */ + >; + }; + + /* Aquila GPIO_01 */ + pinctrl_gpio_01: main-gpio0-34-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x088, PIN_INPUT, 7) /* (AF36) MCASP0_AXR6.GPIO0_34 */ /* AQUILA D23 */ + >; + }; + + /* Aquila PCIE_2_RESET# */ + pinctrl_pcie1_reset: main-gpio0-41-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0a4, PIN_INPUT, 7) /* (AJ36) MCASP0_AXR13.GPIO0_41 */ /* AQUILA C35 */ + >; + }; + + /* Aquila ETH_2_xGMII_INT# */ + pinctrl_eth2_int: main-gpio0-44-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0b0, PIN_INPUT_PULLUP, 7) /* (AL33) MCASP1_AXR3.GPIO0_44 */ /* AQUILA B81 */ + >; + }; + + /* Aquila GPIO_11_CSI_1 */ + pinctrl_gpio_11_csi_1: main-gpio0-47-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0bc, PIN_INPUT, 7) /* (AD33) MCASP1_AFSX.GPIO0_47 */ /* AQUILA A11 */ + >; + }; + + /* Aquila GPIO_12_CSI_1 */ + pinctrl_gpio_12_csi_1: main-gpio0-48-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0c0, PIN_INPUT, 7) /* (AD38) MCASP1_AXR0.GPIO0_48 */ /* AQUILA B19 */ + >; + }; + + /* Aquila SD_1_PWR_EN */ + pinctrl_sd1_pwr_en: main-gpio0-52-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0d0, PIN_INPUT, 7) /* (AP38) SPI0_CS1.GPIO0_52 */ /* AQUILA A6 */ + >; + }; + + /* Aquila SD_1_CD# as GPIO */ + pinctrl_sd1_cd_gpio: main-gpio0-58-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0e8, PIN_INPUT_PULLUP, 7) /* (AR38) TIMER_IO0.GPIO0_58 */ /* AQUILA A1 */ + >; + }; + + /* Aquila I2C_3_DSI1 */ + pinctrl_main_i2c0: main-i2c0-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0e0, PIN_INPUT, 0) /* (AN36) I2C0_SCL */ /* AQUILA B41 */ + J784S4_IOPAD(0x0e4, PIN_INPUT, 0) /* (AP37) I2C0_SDA */ /* AQUILA B40 */ + >; + }; + + /* Aquila I2C_4_CSI1 */ + pinctrl_main_i2c1: main-i2c1-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x020, PIN_INPUT_PULLUP, 12) /* (AJ35) MCAN15_RX.I2C1_SCL */ /* AQUILA A13 */ + J784S4_IOPAD(0x024, PIN_INPUT_PULLUP, 12) /* (AH34) MCAN16_TX.I2C1_SDA */ /* AQUILA A12 */ + >; + }; + + /* Aquila I2C_5_CSI2 */ + pinctrl_main_i2c2: main-i2c2-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x04c, PIN_INPUT_PULLUP, 13) /* (AC32) MCASP1_AXR1.I2C2_SCL */ /* AQUILA C6 */ + J784S4_IOPAD(0x050, PIN_INPUT_PULLUP, 13) /* (AC37) MCASP1_AXR2.I2C2_SDA */ /* AQUILA C5 */ + >; + }; + + /* Aquila I2C_6 */ + pinctrl_main_i2c5: main-i2c5-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x01c, PIN_INPUT_PULLUP, 8) /* (AG34) MCAN15_TX.I2C5_SCL */ /* AQUILA C19 */ + J784S4_IOPAD(0x018, PIN_INPUT_PULLUP, 8) /* (AK36) MCAN14_RX.I2C5_SDA */ /* AQUILA C18 */ + >; + }; + + /* Aquila I2S_1_MCLK */ + pinctrl_audio_extrefclk1: audio-extrefclk1-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x078, PIN_OUTPUT, 1) /* (AH37) MCAN2_RX.AUDIO_EXT_REFCLK1 */ /* AQUILA B24 */ + >; + }; + + /* Aquila CAN_1 */ + pinctrl_main_mcan10: main-mcan10-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0b8, PIN_INPUT, 0) /* (AC34) MCASP1_ACLKX.MCAN10_RX */ /* AQUILA B49 */ + J784S4_IOPAD(0x0b4, PIN_OUTPUT, 0) /* (AL34) MCASP1_AXR4.MCAN10_TX */ /* AQUILA B48 */ + >; + }; + + /* Aquila CAN_3 */ + pinctrl_main_mcan13: main-mcan13-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x010, PIN_INPUT, 0) /* (AH33) MCAN13_RX */ /* AQUILA B54 */ + J784S4_IOPAD(0x00c, PIN_OUTPUT, 0) /* (AF33) MCAN13_TX */ /* AQUILA B53 */ + >; + }; + + /* Aquila I2S_1 */ + pinctrl_main_mcasp4: main-mcasp4-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0c8, PIN_INPUT, 1) /* (AJ32) EXT_REFCLK1.MCASP4_ACLKX */ /* AQUILA B20 */ + J784S4_IOPAD(0x06c, PIN_INPUT, 1) /* (AJ37) MCAN1_TX.MCASP4_AFSX */ /* AQUILA B21 */ + J784S4_IOPAD(0x068, PIN_OUTPUT, 1) /* (AE38) MCAN0_RX.MCASP4_AXR1 */ /* AQUILA B22 */ + J784S4_IOPAD(0x0c4, PIN_INPUT, 1) /* (AD36) ECAP0_IN_APWM_OUT.MCASP4_AXR2 */ /* AQUILA B23 */ + >; + }; + + /* Aquila ETH_2_XGMII_MDIO */ + pinctrl_main_mdio1: main-mdio1-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x058, PIN_OUTPUT, 4) /* (AE37) MCASP2_AFSX.MDIO1_MDC */ /* AQUILA B90 */ + J784S4_IOPAD(0x05c, PIN_INPUT, 4) /* (AC36) MCASP2_AXR0.MDIO1_MDIO */ /* AQUILA B89 */ + >; + }; + + /* Aquila SD_1 */ + pinctrl_main_mmc1: main-mmc1-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x104, PIN_INPUT, 0) /* (AB38) MMC1_CLK */ /* AQUILA A5 */ + J784S4_IOPAD(0x108, PIN_INPUT, 0) /* (AB36) MMC1_CMD */ /* AQUILA A7 */ + J784S4_IOPAD(0x100, PIN_INPUT, 0) /* (No Pin) MMC1_CLKLB */ + J784S4_IOPAD(0x0fc, PIN_INPUT, 0) /* (AA33) MMC1_DAT0 */ /* AQUILA A3 */ + J784S4_IOPAD(0x0f8, PIN_INPUT, 0) /* (AB34) MMC1_DAT1 */ /* AQUILA A2 */ + J784S4_IOPAD(0x0f4, PIN_INPUT, 0) /* (AA32) MMC1_DAT2 */ /* AQUILA A10 */ + J784S4_IOPAD(0x0f0, PIN_INPUT, 0) /* (AC38) MMC1_DAT3 */ /* AQUILA A8 */ + >; + }; + + /* Aquila SPI_2 */ + pinctrl_main_spi0: main-spi0-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0d4, PIN_OUTPUT, 0) /* (AN38) SPI0_CLK */ /* AQUILA D14 */ + J784S4_IOPAD(0x0d8, PIN_INPUT, 0) /* (AM35) SPI0_D0 */ /* AQUILA D15 */ + J784S4_IOPAD(0x0dc, PIN_OUTPUT, 0) /* (AM36) SPI0_D1 */ /* AQUILA D17 */ + >; + }; + + /* Aquila SPI_2 CS */ + pinctrl_main_spi0_cs0: main-spi0-cs0-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0cc, PIN_OUTPUT, 0) /* (AM37) SPI0_CS0 */ /* AQUILA D16 */ + >; + }; + + /* Aquila SPI_1 */ + pinctrl_main_spi2: main-spi2-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0a0, PIN_OUTPUT, 10) /* (AD34) MCASP0_AXR12.SPI2_CLK */ /* AQUILA D12 */ + J784S4_IOPAD(0x0a8, PIN_INPUT, 10) /* (AF34) MCASP0_AXR14.SPI2_D0 */ /* AQUILA D10 */ + J784S4_IOPAD(0x0ac, PIN_OUTPUT, 10) /* (AE34) MCASP0_AXR15.SPI2_D1 */ /* AQUILA D11 */ + >; + }; + + /* Aquila SPI_1 CS */ + pinctrl_main_spi2_cs0: main-spi2-cs0-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x09c, PIN_OUTPUT, 10) /* (AF35) MCASP0_AXR11.SPI2_CS1 */ /* AQUILA D9 */ + >; + }; + + /* Aquila UART_1 */ + pinctrl_main_uart4: main-uart4-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x094, PIN_INPUT, 11) /* (AG35) MCASP0_AXR9.UART4_CTSn */ /* AQUILA B36 */ + J784S4_IOPAD(0x098, PIN_OUTPUT, 11) /* (AH36) MCASP0_AXR10.UART4_RTSn */ /* AQUILA B38 */ + J784S4_IOPAD(0x08c, PIN_INPUT, 11) /* (AE35) MCASP0_AXR7.UART4_RXD */ /* AQUILA B35 */ + J784S4_IOPAD(0x090, PIN_OUTPUT, 11) /* (AC35) MCASP0_AXR8.UART4_TXD */ /* AQUILA B37 */ + >; + }; + + /* Aquila UART_3, used as the Linux console */ + pinctrl_main_uart8: main-uart8-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x038, PIN_INPUT, 11) /* (AK35) MCASP0_ACLKX.UART8_RXD */ /* AQUILA D19 */ + J784S4_IOPAD(0x03c, PIN_OUTPUT, 11) /* (AK38) MCASP0_AFSX.UART8_TXD */ /* AQUILA D20 */ + >; + }; +}; + +&wkup_pmx0 { + /* Aquila QSPI_1 (4-bit) */ + pinctrl_mcu_ospi0_4bit: mcu-ospi0-4bit-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (E32) MCU_OSPI0_CLK */ /* AQUILA B65 */ + J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B33) MCU_OSPI0_D0 */ /* AQUILA B68 */ + J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B32) MCU_OSPI0_D1 */ /* AQUILA B67 */ + J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (C33) MCU_OSPI0_D2 */ /* AQUILA B61 */ + J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (C35) MCU_OSPI0_D3 */ /* AQUILA B60 */ + J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */ /* AQUILA B63 */ + >; + }; + + /* Aquila QSPI_1 (8-bit) */ + pinctrl_mcu_ospi0_8bit: mcu-ospi0-8bit-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (E32) MCU_OSPI0_CLK */ /* AQUILA B65 */ + J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B33) MCU_OSPI0_D0 */ /* AQUILA B68 */ + J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B32) MCU_OSPI0_D1 */ /* AQUILA B67 */ + J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (C33) MCU_OSPI0_D2 */ /* AQUILA B61 */ + J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (C35) MCU_OSPI0_D3 */ /* AQUILA B60 */ + J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D33) MCU_OSPI0_D4 */ /* AQUILA B70 */ + J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D34) MCU_OSPI0_D5 */ /* AQUILA B71 */ + J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (E34) MCU_OSPI0_D6 */ /* AQUILA B72 */ + J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (E33) MCU_OSPI0_D7 */ /* AQUILA B73 */ + J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */ /* AQUILA B63 */ + >; + }; + + /* Aquila QSPI_1_CS1# */ + pinctrl_mcu_ospi0_cs0: mcu-ospi0-cs0-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (A32) MCU_OSPI0_CSn0 */ /* AQUILA B66 */ + >; + }; + + /* Aquila QSPI_1_CS2# */ + pinctrl_mcu_ospi0_cs1: mcu-ospi0-cs1-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x030, PIN_OUTPUT, 0) /* (A33) MCU_OSPI0_CSn1 */ /* AQUILA B62 */ + >; + }; + + /* Aquila QSPI_1_SCK as GPIO */ + pinctrl_wkup_gpio_16: wkup-gpio0-16-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x000, PIN_INPUT, 7) /* (E32) MCU_OSPI0_CLK.WKUP_GPIO0_16 */ /* AQUILA B65 */ + >; + }; + + /* Aquila GPIO_04 */ + pinctrl_gpio_04: wkup-gpio0-17-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x004, PIN_INPUT, 7) /* (D32) MCU_OSPI0_LBCLKO.WKUP_GPIO0_17 */ /* AQUILA C20 */ + >; + }; + + /* Aquila QSPI_1_DQS as GPIO */ + pinctrl_wkup_gpio_18: wkup-gpio0-18-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 7) /* (C34) MCU_OSPI0_DQS.WKUP_GPIO0_18 */ /* AQUILA B63 */ + >; + }; + + /* Aquila QSPI_1_IO0 as GPIO */ + pinctrl_wkup_gpio_19: wkup-gpio0-19-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 7) /* (B33) MCU_OSPI0_D0.WKUP_GPIO0_19 */ /* AQUILA B68 */ + >; + }; + + /* Aquila QSPI_1_IO1 as GPIO */ + pinctrl_wkup_gpio_20: wkup-gpio0-20-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 7) /* (B32) MCU_OSPI0_D1.WKUP_GPIO0_20 */ /* AQUILA B67 */ + >; + }; + + /* Aquila QSPI_1_IO2 as GPIO */ + pinctrl_wkup_gpio_21: wkup-gpio0-21-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 7) /* (C33) MCU_OSPI0_D2.WKUP_GPIO0_21 */ /* AQUILA B61 */ + >; + }; + + /* Aquila QSPI_1_IO3 as GPIO */ + pinctrl_wkup_gpio_22: wkup-gpio0-22-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 7) /* (C35) MCU_OSPI0_D3.WKUP_GPIO0_22 */ /* AQUILA B60 */ + >; + }; + + /* Aquila QSPI_1_IO4 as GPIO */ + pinctrl_wkup_gpio_23: wkup-gpio0-23-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 7) /* (D33) MCU_OSPI0_D4.WKUP_GPIO0_23 */ /* AQUILA B70 */ + >; + }; + + /* Aquila QSPI_1_IO5 as GPIO */ + pinctrl_wkup_gpio_24: wkup-gpio0-24-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 7) /* (D34) MCU_OSPI0_D5.WKUP_GPIO0_24 */ /* AQUILA B71 */ + >; + }; + + /* Aquila QSPI_1_IO6 as GPIO */ + pinctrl_wkup_gpio_25: wkup-gpio0-25-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 7) /* (E34) MCU_OSPI0_D6.WKUP_GPIO0_25 */ /* AQUILA B72 */ + >; + }; + + /* Aquila QSPI_1_IO7 as GPIO */ + pinctrl_wkup_gpio_26: wkup-gpio0-26-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7) /* (E33) MCU_OSPI0_D7.WKUP_GPIO0_26 */ /* AQUILA B73 */ + >; + }; + + /* Aquila QSPI_1_CS#1 as GPIO */ + pinctrl_wkup_gpio_27: wkup-gpio0-27-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x02c, PIN_INPUT, 7) /* (A32) MCU_OSPI0_CSn0.WKUP_GPIO0_27 */ /* AQUILA B66 */ + >; + }; + + /* Aquila QSPI_1_CS#2 as GPIO */ + pinctrl_wkup_gpio_28: wkup-gpio0-28-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x030, PIN_INPUT, 7) /* (A33) MCU_OSPI0_CSn1.WKUP_GPIO0_28 */ /* AQUILA B62 */ + >; + }; +}; + +&wkup_pmx1 { + /* Aquila UART_4 (RXD) */ + pinctrl_mcu_uart0_rx: mcu-uart0-rx-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 4) /* (D31) MCU_OSPI1_D1.MCU_UART0_RXD */ /* AQUILA D21 */ + >; + }; + + /* Aquila GPIO_05 */ + pinctrl_gpio_05: wkup-gpio0-29-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x000, PIN_INPUT, 7) /* (B34) MCU_OSPI0_CSn2.WKUP_GPIO0_29 */ /* AQUILA C21 */ + >; + }; + + /* Aquila GPIO_06 */ + pinctrl_gpio_06: wkup-gpio0-30-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x004, PIN_INPUT, 7) /* (C32) MCU_OSPI0_CSn3.WKUP_GPIO0_30 */ /* AQUILA C22 */ + >; + }; + + /* Aquila GPIO_07 */ + pinctrl_gpio_07: wkup-gpio0-31-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 7) /* (F32) MCU_OSPI1_CLK.WKUP_GPIO0_31 */ /* AQUILA C23 */ + >; + }; + + /* Aquila GPIO_13_CSI_2 */ + pinctrl_gpio_13_csi_2: wkup-gpio0-32-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 7) /* (C31) MCU_OSPI1_LBCLKO.WKUP_GPIO0_32 */ /* AQUILA C1 */ + >; + }; + + /* Aquila GPIO_14_CSI_2 */ + pinctrl_gpio_14_csi_2: wkup-gpio0-33-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 7) /* (F31) MCU_OSPI1_DQS.WKUP_GPIO0_33 */ /* AQUILA C2 */ + >; + }; + + /* RTC_IRQ# */ + pinctrl_rtc_irq: wkup-gpio0-34-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 7) /* (E35) MCU_OSPI1_D0.WKUP_GPIO0_34 */ + >; + }; + + /* Aquila CTRL_PWR_BTN_MICO# (PWR_BTN_INT#) */ + pinctrl_pwr_btn_int: wkup-gpio0-36-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x01c, PIN_INPUT_PULLUP, 7) /* (G31) MCU_OSPI1_D2.WKUP_GPIO0_36 */ /* AQUILA B92 */ + >; + }; + + /* Aquila GPIO_15_CSI_2 */ + pinctrl_gpio_15_csi_2: wkup-gpio0-37-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 7) /* (F33) MCU_OSPI1_D3.WKUP_GPIO0_37 */ /* AQUILA C3 */ + >; + }; + + /* Aquila GPIO_08 */ + pinctrl_gpio_08: wkup-gpio0-38-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 7) /* (G32) MCU_OSPI1_CSn0.WKUP_GPIO0_38 */ /* AQUILA C24 */ + >; + }; + + /* Aquila GPIO_16_CSI_2 */ + pinctrl_gpio_16_csi_2: wkup-gpio0-39-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7) /* (G33) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */ /* AQUILA C4 */ + >; + }; +}; + +&wkup_pmx2 { + /* Aquila ADC_[1-4] */ + pinctrl_mcu_adc0: mcu-adc0-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x0cc, PIN_OUTPUT, 0) /* (P36) MCU_ADC0_AIN0 */ /* AQUILA D1 */ + J784S4_WKUP_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (V36) MCU_ADC0_AIN1 */ /* AQUILA D2 */ + J784S4_WKUP_IOPAD(0x0d4, PIN_OUTPUT, 0) /* (T34) MCU_ADC0_AIN2 */ /* AQUILA D3 */ + J784S4_WKUP_IOPAD(0x0d8, PIN_OUTPUT, 0) /* (T36) MCU_ADC0_AIN3 */ /* AQUILA D4 */ + >; + }; + + /* Aquila CTRL_MCLK_MOCI */ + pinctrl_mcu_clkout0: mcu-clkout0-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x084, PIN_OUTPUT, 6) /* (M38) WKUP_GPIO0_11.MCU_CLKOUT0 */ /* AQUILA A14 */ + >; + }; + + /* Aquila I2C_1 */ + pinctrl_mcu_i2c0: mcu-i2c0-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x0a0, PIN_INPUT, 0) /* (M35) MCU_I2C0_SCL */ /* AQUILA D8 */ + J784S4_WKUP_IOPAD(0x0a4, PIN_INPUT, 0) /* (G34) MCU_I2C0_SDA */ /* AQUILA D7 */ + >; + }; + + /* Aquila I2C_2 */ + pinctrl_mcu_i2c1: mcu-i2c1-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x078, PIN_INPUT_PULLUP, 0) /* (L35) WKUP_GPIO0_8.MCU_I2C1_SCL */ /* AQUILA C17 */ + J784S4_WKUP_IOPAD(0x07c, PIN_INPUT_PULLUP, 0) /* (L34) WKUP_GPIO0_9.MCU_I2C1_SDA */ /* AQUILA C16 */ + >; + }; + + /* Aquila CAN_2 */ + pinctrl_mcu_mcan0: mcu-mcan0-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (F38) MCU_MCAN0_RX */ /* AQUILA B51 */ + J784S4_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (K33) MCU_MCAN0_TX */ /* AQUILA B50 */ + >; + }; + + /* Aquila CAN_4 */ + pinctrl_mcu_mcan1: mcu-mcan1-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (K36) WKUP_GPIO0_5.MCU_MCAN1_RX */ /* AQUILA B56 */ + J784S4_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (H35) WKUP_GPIO0_4.MCU_MCAN1_TX */ /* AQUILA B55 */ + >; + }; + + /* On-module ETH_1 MDIO */ + pinctrl_mcu_mdio: mcu-mdio-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A36) MCU_MDIO0_MDC */ + J784S4_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */ + >; + }; + + /* On-module ETH_1 RGMII */ + pinctrl_mcu_rgmii1: mcu-rgmii1-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (A35) MCU_RGMII1_RD0 */ + J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B36) MCU_RGMII1_RD1 */ + J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C36) MCU_RGMII1_RD2 */ + J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D36) MCU_RGMII1_RD3 */ + J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (B37) MCU_RGMII1_RXC */ + J784S4_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (C37) MCU_RGMII1_RX_CTL */ + J784S4_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (D37) MCU_RGMII1_TD0 */ + J784S4_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (D38) MCU_RGMII1_TD1 */ + J784S4_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (E37) MCU_RGMII1_TD2 */ + J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E38) MCU_RGMII1_TD3 */ + J784S4_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (E36) MCU_RGMII1_TXC */ + J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (C38) MCU_RGMII1_TX_CTL */ + >; + }; + + /* On-module SPI (TPM_SPI) */ + pinctrl_mcu_spi0: mcu-spi0-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x038, PIN_OUTPUT, 0) /* (G38) MCU_SPI0_CLK */ + J784S4_WKUP_IOPAD(0x044, PIN_OUTPUT, 0) /* (F37) MCU_SPI0_CS0 */ + J784S4_WKUP_IOPAD(0x03c, PIN_INPUT, 0) /* (H36) MCU_SPI0_D0 */ + J784S4_WKUP_IOPAD(0x040, PIN_OUTPUT, 0) /* (J38) MCU_SPI0_D1 */ + >; + }; + + /* Aquila UART_4 (TX) */ + pinctrl_mcu_uart0_tx: mcu-uart0-tx-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x080, PIN_OUTPUT, 2) /* (L33) WKUP_GPIO0_10.MCU_UART0_TXD */ /* AQUILA D22 */ + >; + }; + + /* On-module Wi-Fi Power Enable */ + pinctrl_en_3v3_wifi: wkup-gpio0-57-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x114, PIN_INPUT, 7) /* (M36) WKUP_GPIO0_57 */ + >; + }; + + /* On-module TPM IRQ# */ + pinctrl_tpm_irq: wkup-gpio0-81-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x0f4, PIN_INPUT, 7) /* (V34) MCU_ADC1_AIN2.WKUP_GPIO0_81 */ + >; + }; + + /* On-module I2C - WKUP_I2C0 */ + pinctrl_wkup_i2c0: wkup-i2c0-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */ + J784S4_WKUP_IOPAD(0x09c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */ + >; + }; + + /* Aquila UART_2 */ + pinctrl_wkup_uart0: wkup-uart0-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (L37) WKUP_GPIO0_6.WKUP_UART0_CTSn */ /* AQUILA B32 */ + J784S4_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (L36) WKUP_GPIO0_7.WKUP_UART0_RTSn */ /* AQUILA B34 */ + J784S4_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */ /* AQUILA B31 */ + J784S4_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (K34) WKUP_UART0_TXD */ /* AQUILA B33 */ + >; + }; +}; + +&wkup_pmx3 { + /* Aquila CTRL_WAKE1_MICO# */ + pinctrl_ctrl_wake1_mico: wkup-gpio0-49-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x000, PIN_INPUT_PULLUP, 7) /* (M33) WKUP_GPIO0_49 */ /* AQUILA D6 */ + >; + }; +}; + +/* Aquila I2S_1_MCLK */ +&audio_refclk1 { + assigned-clock-rates = <24576000>; +}; + +/* On-module ETH_1 MDIO */ +&davinci_mdio { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_mdio>; + status = "disabled"; + + mcu_phy0: ethernet-phy@0 { + reg = <0>; + interrupt-parent = <&wkup_gpio0>; + interrupts = <79 IRQ_TYPE_EDGE_FALLING>; + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; + }; +}; + +&dss { + assigned-clocks = <&k3_clks 218 2>, + <&k3_clks 218 5>; + assigned-clock-parents = <&k3_clks 218 3>, + <&k3_clks 218 7>; + status = "disabled"; +}; + +&dss_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dpi0_out: endpoint { + remote-endpoint = <&dp0_in>; + }; + }; +}; + +&dp0_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dp0_in: endpoint { + remote-endpoint = <&dpi0_out>; + }; + }; +}; + +&main0_crit { + temperature = <105000>; +}; + +&main0_thermal { + trips { + main0_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <2000>; + type = "active"; + }; + + main0_alert1: trip-point1 { + temperature = <85000>; + hysteresis = <2000>; + type = "active"; + }; + }; +}; + +&main1_crit { + temperature = <105000>; +}; + +&main1_thermal { + trips { + main1_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <2000>; + type = "active"; + }; + + main1_alert1: trip-point1 { + temperature = <85000>; + hysteresis = <2000>; + type = "active"; + }; + }; +}; + +&main2_crit { + temperature = <105000>; +}; + +&main2_thermal { + trips { + main2_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <2000>; + type = "active"; + }; + + main2_alert1: trip-point1 { + temperature = <85000>; + hysteresis = <2000>; + type = "active"; + }; + }; +}; + +&main3_crit { + temperature = <105000>; +}; + +&main3_thermal { + trips { + main3_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <2000>; + type = "active"; + }; + + main3_alert1: trip-point1 { + temperature = <85000>; + hysteresis = <2000>; + type = "active"; + }; + }; +}; + +&main4_crit { + temperature = <105000>; +}; + +&main4_thermal { + trips { + main4_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <2000>; + type = "active"; + }; + + main4_alert1: trip-point1 { + temperature = <85000>; + hysteresis = <2000>; + type = "active"; + }; + }; +}; + +/* Aquila ETH_2 SGMII PHY */ +&main_cpsw0_port8 { + phy-mode = "sgmii"; + phys = <&cpsw0_phy_gmii_sel 8>, <&serdes2_sgmii_link>; + phy-names = "mac", "serdes"; + status = "disabled"; +}; + +/* Aquila ETH_2_XGMII_MDIO */ +&main_cpsw0_mdio { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_mdio1>; +}; + +/* Aquila PWM_1 */ +&main_ehrpwm0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_ehrpwm0_b>; + status = "disabled"; +}; + +/* Aquila PWM_2 */ +&main_ehrpwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_ehrpwm1_a>; + status = "disabled"; +}; + +/* Aquila PWM_4_DP */ +&main_ehrpwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_ehrpwm2_a>; + status = "disabled"; +}; + +/* Aquila PWM_3_DSI */ +&main_ehrpwm5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_ehrpwm5_a>; + status = "disabled"; +}; + +&main_gpio0 { + gpio-line-names = + "", /* 0 */ + "AQUILA_B17", + "AQUILA_B18", + "AQUILA_B53", + "AQUILA_B54", + "AQUILA_B59", + "AQUILA_C18", + "AQUILA_C19", + "AQUILA_A13", + "AQUILA_A12", + "AQUILA_B75", /* 10 */ + "AQUILA_B77", + "AQUILA_B42", + "AQUILA_B44", + "AQUILA_D19", + "AQUILA_D20", + "AQUILA_B58", + "AQUILA_D24", + "AQUILA_B45", + "AQUILA_C06", + "AQUILA_C05", /* 20 */ + "AQUILA_B57", + "AQUILA_B90", + "AQUILA_B89", + "AQUILA_C26", + "AQUILA_C25", + "AQUILA_B22", + "AQUILA_B21", + "AQUILA_B74", + "AQUILA_D25", + "AQUILA_B24", /* 30 */ + "AQUILA_B43", + "AQUILA_C38", + "AQUILA_B46", + "AQUILA_D23", + "AQUILA_B35", + "AQUILA_B37", + "AQUILA_B36", + "AQUILA_B38", + "AQUILA_D09", + "AQUILA_D12", /* 40 */ + "AQUILA_C35", + "AQUILA_D10", + "AQUILA_D11", + "AQUILA_B81", + "AQUILA_B48", + "AQUILA_B49", + "AQUILA_A11", + "AQUILA_B19", + "AQUILA_B23", + "AQUILA_B20", /* 50 */ + "AQUILA_D16", + "AQUILA_A06", + "AQUILA_D14", + "AQUILA_D15", + "AQUILA_D17", + "AQUILA_B41", + "AQUILA_B40", + "AQUILA_A01", + "", + "AQUILA_A08", /* 60 */ + "AQUILA_A10", + "AQUILA_A02", + "AQUILA_A03", + "AQUILA_A05", + "AQUILA_A07"; + + status = "okay"; +}; + +/* Aquila I2C_3_DSI1 */ +&main_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_i2c0>; + clock-frequency = <100000>; + status = "disabled"; +}; + +/* Aquila I2C_4_CSI1 */ +&main_i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_i2c1>; + clock-frequency = <400000>; + status = "disabled"; +}; + +/* Aquila I2C_5_CSI2 */ +&main_i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_i2c2>; + clock-frequency = <400000>; + status = "disabled"; +}; + +/* Aquila I2C_6 */ +&main_i2c5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_i2c5>; + clock-frequency = <400000>; + status = "disabled"; +}; + +/* Aquila CAN_1 */ +&main_mcan10 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_mcan10>; + status = "disabled"; +}; + +/* Aquila CAN_3 */ +&main_mcan13 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_mcan13>; + status = "disabled"; +}; + +/* On-module eMMC */ +&main_sdhci0 { + disable-wp; + non-removable; + ti,driver-strength-ohm = <50>; + status = "okay"; +}; + +/* Aquila SD_1 */ +&main_sdhci1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_mmc1>, <&pinctrl_sd1_cd_gpio>; + cd-gpios = <&main_gpio0 58 GPIO_ACTIVE_LOW>; + disable-wp; + vmmc-supply = <®_sdhc1_vmmc>; + vqmmc-supply = <®_sdhc1_vqmmc>; + ti,driver-strength-ohm = <50>; + ti,fails-without-test-cd; + status = "disabled"; +}; + +/* Aquila SPI_2 */ +&main_spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_spi0>, <&pinctrl_main_spi0_cs0>; + status = "disabled"; +}; + +/* Aquila SPI_1 */ +&main_spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_spi2>, <&pinctrl_main_spi2_cs0>; + status = "disabled"; +}; + +/* Aquila UART_1 */ +&main_uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_uart4>; + status = "disabled"; +}; + +/* Aquila UART_3, used as the Linux console */ +&main_uart8 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_uart8>; + status = "disabled"; +}; + +/* Aquila I2S_1 */ +&mcasp4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_mcasp4>; + op-mode = <0>; /* MCASP_I2S_MODE */ + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ + 0 1 2 0 + 0 0 0 0 + 0 0 0 0 + 0 0 0 0 + >; + tdm-slots = <2>; + #sound-dai-cells = <0>; + status = "disabled"; +}; + +&mcu_cpsw { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_rgmii1>; + status = "disabled"; +}; + +/* On-module ETH_1 RGMII */ +&mcu_cpsw_port1 { + phy-handle = <&mcu_phy0>; + phy-mode = "rgmii-id"; + status = "disabled"; +}; + +/* Aquila I2C_1 */ +&mcu_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_i2c0>; + clock-frequency = <400000>; + status = "disabled"; +}; + +/* Aquila I2C_2 */ +&mcu_i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_i2c1>; + clock-frequency = <400000>; + status = "disabled"; +}; + +/* Aquila CAN_2 */ +&mcu_mcan0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_mcan0>; + status = "disabled"; +}; + +/* Aquila CAN_4 */ +&mcu_mcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_mcan1>; + status = "disabled"; +}; + +/* On-module SPI (TPM_SPI) */ +&mcu_spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_spi0>; + status = "okay"; + + tpm@0 { + compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi"; + reg = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tpm_irq>; + interrupt-parent = <&wkup_gpio0>; + interrupts = <81 IRQ_TYPE_EDGE_FALLING>; + spi-max-frequency = <33000000>; + }; +}; + +/* Aquila UART_4 */ +&mcu_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_uart0_rx>, <&pinctrl_mcu_uart0_tx>; + status = "disabled"; +}; + +&mhdp { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_dp0_hpd>; + phy-names = "dpphy"; + phys = <&serdes4_dp0_link>; + status = "disabled"; +}; + +/* Aquila QSPI_1 */ +&ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_ospi0_8bit>, <&pinctrl_mcu_ospi0_cs0>; + status = "disabled"; +}; + +/* Aquila PCIE_1 */ +&pcie0_rc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie0_reset>; + clocks = <&k3_clks 332 0>, <&serdes1 CDNS_TORRENT_REFCLK_DRIVER>; + clock-names = "fck", "pcie_refclk"; + num-lanes = <2>; + phy-names = "pcie-phy"; + phys = <&serdes1_pcie0_2l_link>; + reset-gpios = <&main_gpio0 32 GPIO_ACTIVE_HIGH>; + ti,syscon-acspcie-proxy-ctrl = <&acspcie1_proxy_ctrl 0x3>; + status = "disabled"; +}; + +/* Aquila PCIE_2 */ +&pcie1_rc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie1_reset>; + clocks = <&k3_clks 333 0>, <&serdes0 CDNS_TORRENT_REFCLK_DRIVER>; + clock-names = "fck", "pcie_refclk"; + num-lanes = <2>; + phy-names = "pcie-phy"; + phys = <&serdes0_pcie1_2l_link>; + reset-gpios = <&main_gpio0 41 GPIO_ACTIVE_HIGH>; + ti,syscon-acspcie-proxy-ctrl = <&acspcie0_proxy_ctrl 0x3>; + status = "disabled"; +}; + +/* On-module PCIe USB Bridge */ +&pcie2_rc { + clocks = <&k3_clks 334 0>, <&serdes1 CDNS_TORRENT_REFCLK_DRIVER>; + clock-names = "fck", "pcie_refclk"; + num-lanes = <1>; + phy-names = "pcie-phy"; + phys = <&serdes1_pcie2_1l_link>; + reset-gpios = <&som_gpio_expander 3 GPIO_ACTIVE_HIGH>; + ti,syscon-acspcie-proxy-ctrl = <&acspcie1_proxy_ctrl 0x3>; + status = "okay"; + + pci@0,0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + + usb@0 { + compatible = "pci104c,8241"; + reg = <0x0 0x0 0x0 0x0 0x0>; + ti,pwron-active-high; + }; + }; +}; + +/* PCIE for On-module Wi-Fi */ +&pcie3_rc { + clocks = <&k3_clks 335 0>, <&serdes0 CDNS_TORRENT_REFCLK_DRIVER>; + clock-names = "fck", "pcie_refclk"; + num-lanes = <1>; + phy-names = "pcie-phy"; + phys = <&serdes0_pcie3_1l_link>; + reset-gpios = <&som_gpio_expander 4 GPIO_ACTIVE_HIGH>; + ti,syscon-acspcie-proxy-ctrl = <&acspcie0_proxy_ctrl 0x3>; + status = "okay"; +}; + +&serdes0 { + status = "okay"; + + /* Aquila PCIE_2 */ + serdes0_pcie1_2l_link: phy@0 { + reg = <0>; + #phy-cells = <0>; + resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>; + cdns,num-lanes = <2>; + cdns,phy-type = <PHY_TYPE_PCIE>; + }; + + /* On-module PCIe Wi-Fi */ + serdes0_pcie3_1l_link: phy@2 { + reg = <2>; + #phy-cells = <0>; + resets = <&serdes_wiz0 3>; + cdns,num-lanes = <1>; + cdns,phy-type = <PHY_TYPE_PCIE>; + }; + + /* Aquila USB0 SS */ + serdes0_usb0_ss_link: phy@3 { + reg = <3>; + #phy-cells = <0>; + resets = <&serdes_wiz0 4>; + cdns,num-lanes = <1>; + cdns,phy-type = <PHY_TYPE_USB3>; + }; +}; + +&serdes1 { + status = "okay"; + + /* Aquila PCIE_1 */ + serdes1_pcie0_2l_link: phy@0 { + reg = <0>; + #phy-cells = <0>; + resets = <&serdes_wiz1 1>, <&serdes_wiz1 2>; + cdns,num-lanes = <2>; + cdns,phy-type = <PHY_TYPE_PCIE>; + }; + + /* On-module PCIe USB Bridge */ + serdes1_pcie2_1l_link: phy@2 { + reg = <2>; + #phy-cells = <0>; + resets = <&serdes_wiz1 3>; + cdns,num-lanes = <1>; + cdns,phy-type = <PHY_TYPE_PCIE>; + }; +}; + +&serdes2 { + status = "disabled"; + + /* Aquila ETH_2 xGMII */ + serdes2_sgmii_link: phy@3 { + reg = <3>; + #phy-cells = <0>; + resets = <&serdes_wiz2 4>; + cdns,num-lanes = <1>; + cdns,phy-type = <PHY_TYPE_SGMII>; + }; +}; + +&serdes4 { + status = "disabled"; + + /* Aquila DP_1 */ + serdes4_dp0_link: phy@0 { + reg = <0>; + #phy-cells = <0>; + resets = <&serdes_wiz4 1>, <&serdes_wiz4 2>, + <&serdes_wiz4 3>, <&serdes_wiz4 4>; + cdns,max-bit-rate = <5400>; + cdns,num-lanes = <4>; + cdns,phy-type = <PHY_TYPE_DP>; + }; +}; + +&serdes_refclk { + clock-frequency = <100000000>; + status = "okay"; +}; + +&serdes_ln_ctrl { + idle-states = <J784S4_SERDES0_LANE0_PCIE1_LANE0>, /* Aquila PCIE_2 L0 */ + <J784S4_SERDES0_LANE1_PCIE1_LANE1>, /* Aquila PCIE_2 L1 */ + <J784S4_SERDES0_LANE2_PCIE3_LANE0>, /* On-module PCIe Wi-Fi */ + <J784S4_SERDES0_LANE3_USB>, /* Aquila USB0 SS */ + <J784S4_SERDES1_LANE0_PCIE0_LANE0>, /* Aquila PCIE_1 L0 */ + <J784S4_SERDES1_LANE1_PCIE0_LANE1>, /* Aquila PCIE_1 L1 */ + <J784S4_SERDES1_LANE2_PCIE2_LANE0>, /* On-module PCIe USB Bridge */ + <J784S4_SERDES1_LANE3_QSGMII_LANE2>, /* Aquila SGMII MSP_9 */ + <J784S4_SERDES2_LANE0_QSGMII_LANE5>, /* Aquila SGMII MSP_6 */ + <J784S4_SERDES2_LANE1_QSGMII_LANE6>, /* Aquila SGMII MSP_7 */ + <J784S4_SERDES2_LANE2_QSGMII_LANE7>, /* Aquila SGMII MSP_8 */ + <J784S4_SERDES2_LANE3_QSGMII_LANE8>, /* Aquila ETH_2 xGMII */ + <J784S4_SERDES4_LANE0_EDP_LANE0>, /* Aquila DP L0 */ + <J784S4_SERDES4_LANE1_EDP_LANE1>, /* Aquila DP L1 */ + <J784S4_SERDES4_LANE2_EDP_LANE2>, /* Aquila DP L2 */ + <J784S4_SERDES4_LANE3_EDP_LANE3>; /* Aquila DP L3 */ +}; + +&serdes_wiz0 { + status = "okay"; +}; + +&serdes_wiz1 { + status = "okay"; +}; + +&serdes_wiz2 { + status = "disabled"; +}; + +&serdes_wiz4 { + status = "disabled"; +}; + +/* Aquila ADC_[1-4] */ +&tscadc0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_adc0>; + status = "disabled"; + + adc { + ti,adc-channels = <0 1 2 3>; + }; +}; + +&usb0 { + phys = <&serdes0_usb0_ss_link>; + phy-names = "cdns3,usb3-phy"; + dr_mode = "otg"; + maximum-speed = "super-speed"; + usb-role-switch; + status = "disabled"; +}; + +&usb_serdes_mux { + idle-states = <0>; /* USB0 to SERDES lane 3 */ +}; + +&usbss0 { + ti,vbus-divider; + status = "disabled"; +}; + +&wkup_gpio0 { + gpio-line-names = + "", /* 0 */ + "", + "", + "AQUILA_C53", + "AQUILA_B55", + "AQUILA_B56", + "AQUILA_B32", + "AQUILA_B34", + "AQUILA_C17", + "AQUILA_C16", + "AQUILA_D22", /* 10 */ + "", + "", + "", + "", + "", + "AQUILA_B65", + "AQUILA_C20", + "AQUILA_B63", + "AQUILA_B68", + "AQUILA_B67", /* 20 */ + "AQUILA_B61", + "AQUILA_B60", + "AQUILA_B70", + "AQUILA_B71", + "AQUILA_B72", + "AQUILC_B73", + "AQUILA_B66", + "AQUILA_B62", + "AQUILA_C21", + "AQUILA_C22", /* 30 */ + "AQUILA_C23", + "AQUILA_C01", + "AQUILA_C02", + "", + "AQUILA_D21", + "", + "AQUILA_C03", + "AQUILA_C24", + "AQUILA_C04", + "AQUILA_B84", /* 40 */ + "", + "AQUILA_B86", + "AQUILA_B87", + "", + "", + "AQUILA_B83", + "", + "", + "", + "", /* 50 */ + "", + "", + "", + "", + "", + "", + "", + "AQUILA_B31", + "AQUILA_B33", + "AQUILA_B50", /* 60 */ + "AQUILA_B51", + "", + "", + "", + "AQUILA_D08", + "", + "", + "", + "", + "", /* 70 */ + "AQUILA_D01", + "AQUILA_D02", + "AQUILA_D03", + "AQUILA_D04", + "AQUILA_D54", + "AQUILA_D55", + "AQUILA_C55", + "AQUILA_C56", + "", + "AQUILA_C36", /* 80 */ + "", + "", + "", + "", + "", + "", + "AQUILA_D07", + ""; + + status = "okay"; +}; + +/* On-module I2C - WKUP_I2C0 */ +&wkup_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wkup_i2c0>; + clock-frequency = <400000>; + status = "okay"; + + som_gpio_expander: gpio@21 { + compatible = "ti,tca6408"; + reg = <0x21>; + #gpio-cells = <2>; + gpio-controller; + gpio-line-names = + "USB_MUX_SEL", + "COLD_RESET_REQ", + "PWR_DOWN_REQ", + "PCIE_3_RESET#", + "PCIE_4_RESET#", + "WIFI_DISABLE", + "BT_DISABLE", + "SDIO_PWR_SEL_3.3V"; + }; + + rtc_i2c: rtc@32 { + compatible = "epson,rx8130"; + reg = <0x32>; + }; + + tps62873a: regulator@40 { + compatible = "ti,tps62873"; + reg = <0x40>; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <900000>; + regulator-min-microvolt = <600000>; + regulator-name = "+VDD_CPU_AVS"; + }; + + tps62873b: regulator@43 { + compatible = "ti,tps62873"; + reg = <0x43>; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <840000>; + regulator-min-microvolt = <760000>; + regulator-name = "+V0.8_VDD_CORE"; + }; + + pmic_tps6594: pmic@48 { + compatible = "ti,tps6594-q1"; + reg = <0x48>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pmic_int>; + interrupt-parent = <&main_gpio0>; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + #gpio-cells = <2>; + gpio-controller; + buck12-supply = <®_vin>; + buck3-supply = <®_vin>; + buck4-supply = <®_vin>; + buck5-supply = <®_vin>; + ldo1-supply = <®_vin>; + ldo2-supply = <®_vin>; + ldo3-supply = <®_vin>; + ldo4-supply = <®_vin>; + system-power-controller; + ti,primary-pmic; + + regulators { + reg_vdd_ddr: buck12 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1100000>; + regulator-min-microvolt = <1100000>; + regulator-name = "+V1.1_VDD_DDR (PMIC BUCK12)"; + }; + + reg_vdd_ram: buck3 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <850000>; + regulator-min-microvolt = <850000>; + regulator-name = "+V0.85_VDD_RAM (PMIC BUCK3)"; + }; + + reg_vdd_io: buck4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "+V1.8_VDD_IO (PMIC BUCK4)"; + }; + + reg_3v3_vio: buck5 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3_VIO (PMIC BUCK5)"; + }; + + reg_vda_phy: ldo1 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "+V1.8_VDA_PHY (PMIC LDO1)"; + }; + + reg_2v5_eth: ldo2 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <2500000>; + regulator-min-microvolt = <2500000>; + regulator-name = "+V2.5_ETH (PMIC LDO2)"; + }; + + reg_vda_dll: ldo3 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <800000>; + regulator-min-microvolt = <800000>; + regulator-name = "+V0.8_VDA_DLL (PMIC LDO3)"; + }; + + reg_vda_pll: ldo4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "+V0.8_VDA_PLL (PMIC LDO4)"; + }; + }; + }; + + temperature-sensor@4f { + compatible = "ti,tmp1075"; + reg = <0x4f>; + }; + + som_eeprom: eeprom@50 { + compatible = "st,24c02", "atmel,24c02"; + reg = <0x50>; + pagesize = <16>; + }; +}; + +&wkup0_crit { + temperature = <105000>; +}; + +&wkup0_thermal { + trips { + wkup0_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <2000>; + type = "active"; + }; + + wkup0_alert1: trip-point1 { + temperature = <85000>; + hysteresis = <2000>; + type = "active"; + }; + }; +}; + +&wkup1_crit { + temperature = <105000>; +}; + +&wkup1_thermal { + trips { + wkup1_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <2000>; + type = "active"; + }; + + wkup1_alert1: trip-point1 { + temperature = <85000>; + hysteresis = <2000>; + type = "active"; + }; + }; +}; + +&wkup_gpio_intr { + status = "okay"; +}; + +/* Aquila UART_2 */ +&wkup_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wkup_uart0>; + status = "disabled"; +}; + +#include "k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi" +#include "k3-j784s4-ti-ipc-firmware.dtsi" diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts index 5896e57b5b9e..abe2f21e0e1d 100644 --- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts @@ -236,8 +236,8 @@ main_i2c0_pins_default: main-i2c0-default-pins { pinctrl-single,pins = < - J784S4_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AN36) I2C0_SCL */ - J784S4_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AP37) I2C0_SDA */ + J784S4_IOPAD(0x0e0, PIN_INPUT, 0) /* (AN36) I2C0_SCL */ + J784S4_IOPAD(0x0e4, PIN_INPUT, 0) /* (AP37) I2C0_SDA */ >; }; @@ -416,8 +416,8 @@ mcu_i2c0_pins_default: mcu-i2c0-default-pins { pinctrl-single,pins = < - J784S4_WKUP_IOPAD(0x0a0, PIN_INPUT_PULLUP, 0) /* (M35) MCU_I2C0_SCL */ - J784S4_WKUP_IOPAD(0x0a4, PIN_INPUT_PULLUP, 0) /* (G34) MCU_I2C0_SDA */ + J784S4_WKUP_IOPAD(0x0a0, PIN_INPUT, 0) /* (M35) MCU_I2C0_SCL */ + J784S4_WKUP_IOPAD(0x0a4, PIN_INPUT, 0) /* (G34) MCU_I2C0_SDA */ >; }; @@ -771,7 +771,7 @@ &mcu_cpsw_port1 { status = "okay"; - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&mcu_phy0>; bootph-all; }; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts index f684ce6ad9ad..3e5efdfe87f1 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts @@ -323,6 +323,7 @@ &mcu_cpsw { pinctrl-names = "default"; pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>; + status = "okay"; }; &davinci_mdio { @@ -334,7 +335,7 @@ }; &cpsw_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&phy0>; }; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi index 692c4745040e..fec1db8b133d 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -432,6 +432,8 @@ "tx4", "tx5", "tx6", "tx7", "rx"; + status = "disabled"; + ethernet-ports { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts index 352fb60e6ce8..8040b6528c18 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts @@ -663,6 +663,7 @@ &mcu_cpsw { pinctrl-names = "default"; pinctrl-0 = <&mcu_cpsw_pins_default>; + status = "okay"; }; &davinci_mdio { @@ -677,7 +678,7 @@ }; &cpsw_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&phy0>; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 45311438315f..47702fb279a4 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -769,6 +769,7 @@ &mcu_cpsw { pinctrl-names = "default"; pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>; + status = "okay"; }; &davinci_mdio { @@ -780,7 +781,7 @@ }; &cpsw_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&phy0>; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-evm-gesi-exp-board.dtso b/arch/arm64/boot/dts/ti/k3-j721e-evm-gesi-exp-board.dtso index f84aa9f94547..3bfe6036a8e6 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-evm-gesi-exp-board.dtso +++ b/arch/arm64/boot/dts/ti/k3-j721e-evm-gesi-exp-board.dtso @@ -37,7 +37,7 @@ &cpsw0_port1 { status = "okay"; phy-handle = <&cpsw9g_phy12>; - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; mac-address = [00 00 00 00 00 00]; phys = <&cpsw0_phy_gmii_sel 1>; }; @@ -45,7 +45,7 @@ &cpsw0_port2 { status = "okay"; phy-handle = <&cpsw9g_phy15>; - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; mac-address = [00 00 00 00 00 00]; phys = <&cpsw0_phy_gmii_sel 2>; }; @@ -53,7 +53,7 @@ &cpsw0_port3 { status = "okay"; phy-handle = <&cpsw9g_phy0>; - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; mac-address = [00 00 00 00 00 00]; phys = <&cpsw0_phy_gmii_sel 3>; }; @@ -61,7 +61,7 @@ &cpsw0_port4 { status = "okay"; phy-handle = <&cpsw9g_phy3>; - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; mac-address = [00 00 00 00 00 00]; phys = <&cpsw0_phy_gmii_sel 4>; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi index 42a21398e389..d5e5e89be5e9 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -551,6 +551,8 @@ "tx4", "tx5", "tx6", "tx7", "rx"; + status = "disabled"; + ethernet-ports { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts index 5e5784ef6f85..050776cb4df8 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -474,6 +474,12 @@ J721E_IOPAD(0x234, PIN_INPUT, 7) /* (U3) EXT_REFCLK1.GPIO1_12 */ >; }; + + vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x1dc, PIN_OUTPUT, 7) /* (Y1) SPI1_CLK.GPIO0_118 */ + >; + }; }; &wkup_pmx0 { @@ -536,12 +542,6 @@ >; }; - vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { - pinctrl-single,pins = < - J721E_IOPAD(0x1dc, PIN_OUTPUT, 7) /* (Y1) SPI1_CLK.GPIO0_118 */ - >; - }; - wkup_uart0_pins_default: wkup-uart0-default-pins { pinctrl-single,pins = < J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */ @@ -1034,6 +1034,7 @@ &mcu_cpsw { pinctrl-names = "default"; pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>; + status = "okay"; }; &davinci_mdio { @@ -1045,7 +1046,7 @@ }; &cpsw_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&phy0>; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts index 9e43dcff8ef2..4fea99519113 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -457,6 +457,7 @@ &mcu_cpsw { pinctrl-names = "default"; pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>; + status = "okay"; }; &davinci_mdio { @@ -469,7 +470,7 @@ }; &cpsw_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&phy0>; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-evm-gesi-exp-board.dtso b/arch/arm64/boot/dts/ti/k3-j721s2-evm-gesi-exp-board.dtso index 8583178fa1f3..6869a95c6214 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-evm-gesi-exp-board.dtso +++ b/arch/arm64/boot/dts/ti/k3-j721s2-evm-gesi-exp-board.dtso @@ -80,6 +80,6 @@ &main_cpsw_port1 { status = "okay"; - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&main_cpsw_phy0>; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index 837097751c18..2a7f9c519735 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -552,6 +552,8 @@ "tx4", "tx5", "tx6", "tx7", "rx"; + status = "disabled"; + ethernet-ports { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts index e0e303da7e15..7baf5764862b 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts @@ -228,6 +228,11 @@ }; }; +&audio_refclk1 { + assigned-clocks = <&k3_clks 157 0>; + assigned-clock-parents = <&k3_clks 157 15>; +}; + &cpsw_mac_syscon { bootph-all; }; @@ -388,7 +393,7 @@ }; &cpsw_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&cpsw3g_phy0>; status = "okay"; bootph-all; diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi index d57fdd38bdce..873415ec4fa3 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi @@ -437,24 +437,6 @@ mux-reg-masks = <0x00 0x3>, /* SERDES0 lane0 select */ <0x10 0x3>; /* SERDES1 lane0 select */ }; - - audio_refclk0: clock@82e0 { - compatible = "ti,am62-audio-refclk"; - reg = <0x82e0 0x4>; - clocks = <&k3_clks 157 0>; - assigned-clocks = <&k3_clks 157 0>; - assigned-clock-parents = <&k3_clks 157 15>; - #clock-cells = <0>; - }; - - audio_refclk1: clock@82e4 { - compatible = "ti,am62-audio-refclk"; - reg = <0x82e4 0x4>; - clocks = <&k3_clks 157 18>; - assigned-clocks = <&k3_clks 157 18>; - assigned-clock-parents = <&k3_clks 157 33>; - #clock-cells = <0>; - }; }; &wkup_conf { diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm-pcie0-pcie1-ep.dtso b/arch/arm64/boot/dts/ti/k3-j784s4-evm-pcie0-pcie1-ep.dtso index 685305092bd8..22533d678f79 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm-pcie0-pcie1-ep.dtso +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm-pcie0-pcie1-ep.dtso @@ -75,5 +75,6 @@ dma-coherent; phys = <&serdes0_pcie1_link>; phy-names = "pcie-phy"; + bootph-all; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi index 419c1a70e028..e50735577737 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi @@ -270,8 +270,8 @@ main_i2c0_pins_default: main-i2c0-default-pins { pinctrl-single,pins = < - J784S4_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AN36) I2C0_SCL */ - J784S4_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AP37) I2C0_SDA */ + J784S4_IOPAD(0x0e0, PIN_INPUT, 0) /* (AN36) I2C0_SCL */ + J784S4_IOPAD(0x0e4, PIN_INPUT, 0) /* (AP37) I2C0_SDA */ >; }; @@ -920,7 +920,7 @@ &mcu_cpsw_port1 { status = "okay"; - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&mcu_phy0>; }; @@ -944,7 +944,7 @@ }; &main_cpsw1_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&main_cpsw1_phy0>; status = "okay"; }; @@ -970,6 +970,7 @@ &serdes_refclk { status = "okay"; clock-frequency = <100000000>; + bootph-all; }; &dss { @@ -984,6 +985,14 @@ <&k3_clks 218 22>; }; +&pcie1_ctrl { + bootph-all; +}; + +&serdes_ln_ctrl { + bootph-all; +}; + &serdes0 { status = "okay"; @@ -993,6 +1002,7 @@ #phy-cells = <0>; cdns,phy-type = <PHY_TYPE_PCIE>; resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>; + bootph-all; }; serdes0_usb_link: phy@3 { diff --git a/arch/arm64/boot/dts/ti/k3-pinctrl.h b/arch/arm64/boot/dts/ti/k3-pinctrl.h index e46f7bf52701..dc8e03ae74c8 100644 --- a/arch/arm64/boot/dts/ti/k3-pinctrl.h +++ b/arch/arm64/boot/dts/ti/k3-pinctrl.h @@ -123,6 +123,8 @@ #define AM62PX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) #define AM62PX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define AM62LX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) + #define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) #define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) |