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-rw-r--r--include/soc/bcm2835/raspberrypi-firmware.h25
-rw-r--r--include/soc/fsl/phy-fsl-lynx.h43
-rw-r--r--include/soc/mscc/ocelot.h2
-rw-r--r--include/soc/qcom/qcom-spmi-pmic.h15
-rw-r--r--include/soc/rockchip/rk3588_grf.h2
-rw-r--r--include/soc/spacemit/k3-syscon.h4
-rw-r--r--include/soc/tegra/mc.h2
-rw-r--r--include/soc/tegra/pmc.h82
8 files changed, 107 insertions, 68 deletions
diff --git a/include/soc/bcm2835/raspberrypi-firmware.h b/include/soc/bcm2835/raspberrypi-firmware.h
index e1f87fbfe554..975bef529854 100644
--- a/include/soc/bcm2835/raspberrypi-firmware.h
+++ b/include/soc/bcm2835/raspberrypi-firmware.h
@@ -156,6 +156,31 @@ enum rpi_firmware_clk_id {
RPI_FIRMWARE_NUM_CLK_ID,
};
+enum rpi_firmware_volt_id {
+ RPI_FIRMWARE_VOLT_ID_CORE = 1,
+ RPI_FIRMWARE_VOLT_ID_SDRAM_C = 2,
+ RPI_FIRMWARE_VOLT_ID_SDRAM_P = 3,
+ RPI_FIRMWARE_VOLT_ID_SDRAM_I = 4,
+ RPI_FIRMWARE_NUM_VOLT_ID,
+};
+
+/**
+ * struct rpi_firmware_get_voltage_request - Firmware request for a voltage
+ * @id: ID of the voltage being queried
+ * @value: Voltage in microvolts. Set by the firmware.
+ *
+ * Used by @RPI_FIRMWARE_GET_VOLTAGE.
+ */
+struct rpi_firmware_get_voltage_request {
+ __le32 id;
+ __le32 value;
+} __packed;
+
+#define RPI_FIRMWARE_GET_VOLTAGE_REQUEST(_id) \
+ { \
+ .id = cpu_to_le32(_id), \
+ }
+
/**
* struct rpi_firmware_clk_rate_request - Firmware Request for a rate
* @id: ID of the clock being queried
diff --git a/include/soc/fsl/phy-fsl-lynx.h b/include/soc/fsl/phy-fsl-lynx.h
new file mode 100644
index 000000000000..ff5a7d1835b5
--- /dev/null
+++ b/include/soc/fsl/phy-fsl-lynx.h
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/* Copyright 2023-2026 NXP */
+
+#ifndef __PHY_FSL_LYNX_H_
+#define __PHY_FSL_LYNX_H_
+
+enum lynx_lane_mode {
+ LANE_MODE_UNKNOWN,
+ LANE_MODE_1000BASEX_SGMII,
+ LANE_MODE_2500BASEX,
+ LANE_MODE_QSGMII,
+ LANE_MODE_10G_QXGMII,
+ LANE_MODE_10GBASER,
+ LANE_MODE_USXGMII,
+ LANE_MODE_25GBASER,
+ LANE_MODE_MAX,
+};
+
+static inline bool lynx_lane_mode_uses_gmii_mac(enum lynx_lane_mode mode)
+{
+ switch (mode) {
+ case LANE_MODE_1000BASEX_SGMII:
+ case LANE_MODE_2500BASEX:
+ case LANE_MODE_QSGMII:
+ case LANE_MODE_10G_QXGMII:
+ return true;
+ default:
+ return false;
+ }
+}
+
+static inline bool lynx_lane_mode_uses_xgmii_mac(enum lynx_lane_mode mode)
+{
+ switch (mode) {
+ case LANE_MODE_10GBASER:
+ case LANE_MODE_USXGMII:
+ return true;
+ default:
+ return false;
+ }
+}
+
+#endif /* __PHY_FSL_LYNX_H_ */
diff --git a/include/soc/mscc/ocelot.h b/include/soc/mscc/ocelot.h
index 48d6deb3efd7..05a8191b148e 100644
--- a/include/soc/mscc/ocelot.h
+++ b/include/soc/mscc/ocelot.h
@@ -650,7 +650,7 @@ struct device_node;
struct ocelot_ops {
struct net_device *(*port_to_netdev)(struct ocelot *ocelot, int port);
- int (*netdev_to_port)(struct net_device *dev);
+ int (*netdev_to_port)(struct ocelot *ocelot, struct net_device *dev);
int (*reset)(struct ocelot *ocelot);
u16 (*wm_enc)(u16 value);
u16 (*wm_dec)(u16 value);
diff --git a/include/soc/qcom/qcom-spmi-pmic.h b/include/soc/qcom/qcom-spmi-pmic.h
index 2cf9e2d8cd55..997fa18d70fe 100644
--- a/include/soc/qcom/qcom-spmi-pmic.h
+++ b/include/soc/qcom/qcom-spmi-pmic.h
@@ -50,9 +50,22 @@
#define PMR735B_SUBTYPE 0x34
#define PM6350_SUBTYPE 0x36
#define PM4125_SUBTYPE 0x37
+#define PM8010_SUBTYPE 0x41
+#define PM8550VS_SUBTYPE 0x45
+#define PM8550VE_SUBTYPE 0x46
+#define PMR735D_SUBTYPE 0x48
+#define PM8550_SUBTYPE 0x49
+#define PMK8550_SUBTYPE 0x4a
#define PMM8650AU_SUBTYPE 0x4e
#define PMM8650AU_PSAIL_SUBTYPE 0x4f
-
+#define PM8750B_SUBTYPE 0x56
+#define PMD8028_SUBTYPE 0x57
+#define PMK8850_SUBTYPE 0x5c
+#define PMH0101_SUBTYPE 0x5d
+#define SMB2370_SUBTYPE 0x5f
+#define PMH0104_SUBTYPE 0x60
+#define PMH0110_SUBTYPE 0x61
+#define PMCX0102_SUBTYPE 0x62
#define PMI8998_FAB_ID_SMIC 0x11
#define PMI8998_FAB_ID_GF 0x30
diff --git a/include/soc/rockchip/rk3588_grf.h b/include/soc/rockchip/rk3588_grf.h
index 02a7b2432d99..db0092fc66ad 100644
--- a/include/soc/rockchip/rk3588_grf.h
+++ b/include/soc/rockchip/rk3588_grf.h
@@ -19,4 +19,6 @@
/* Whether the LPDDR5 is in 2:1 (= 0) or 4:1 (= 1) CKR a.k.a. DQS mode */
#define RK3588_PMUGRF_OS_REG6_LP5_CKR BIT(0)
+#define RK3588_SYSGRF_SOC_CON6 0x0318
+
#endif /* __SOC_RK3588_GRF_H */
diff --git a/include/soc/spacemit/k3-syscon.h b/include/soc/spacemit/k3-syscon.h
index 0299bea065a0..a68255dd641f 100644
--- a/include/soc/spacemit/k3-syscon.h
+++ b/include/soc/spacemit/k3-syscon.h
@@ -168,8 +168,8 @@
#define APMU_CPU_C2_CLK_CTRL 0x394
#define APMU_CPU_C3_CLK_CTRL 0x208
#define APMU_PCIE_CLK_RES_CTRL_A 0x1f0
-#define APMU_PCIE_CLK_RES_CTRL_B 0x1c8
-#define APMU_PCIE_CLK_RES_CTRL_C 0x1d0
+#define APMU_PCIE_CLK_RES_CTRL_B 0x1d0
+#define APMU_PCIE_CLK_RES_CTRL_C 0x1c8
#define APMU_PCIE_CLK_RES_CTRL_D 0x1e0
#define APMU_PCIE_CLK_RES_CTRL_E 0x1e8
#define APMU_EMAC0_CLK_RES_CTRL 0x3e4
diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h
index e6da035d1306..25d465d70493 100644
--- a/include/soc/tegra/mc.h
+++ b/include/soc/tegra/mc.h
@@ -164,7 +164,7 @@ struct tegra_mc_ops {
*/
int (*probe)(struct tegra_mc *mc);
void (*remove)(struct tegra_mc *mc);
- int (*resume)(struct tegra_mc *mc);
+ void (*resume)(struct tegra_mc *mc);
int (*probe_device)(struct tegra_mc *mc, struct device *dev);
};
diff --git a/include/soc/tegra/pmc.h b/include/soc/tegra/pmc.h
index 1fd21be02577..53f6d02889db 100644
--- a/include/soc/tegra/pmc.h
+++ b/include/soc/tegra/pmc.h
@@ -18,10 +18,6 @@ struct clk;
struct reset_control;
struct tegra_pmc;
-bool tegra_pmc_cpu_is_powered(unsigned int cpuid);
-int tegra_pmc_cpu_power_on(unsigned int cpuid);
-int tegra_pmc_cpu_remove_clamping(unsigned int cpuid);
-
/*
* powergate and I/O rail APIs
*/
@@ -163,22 +159,6 @@ int tegra_pmc_powergate_sequence_power_up(struct tegra_pmc *pmc,
int tegra_pmc_io_pad_power_enable(struct tegra_pmc *pmc, enum tegra_io_pad id);
int tegra_pmc_io_pad_power_disable(struct tegra_pmc *pmc, enum tegra_io_pad id);
-/* legacy */
-int tegra_powergate_power_on(unsigned int id);
-int tegra_powergate_power_off(unsigned int id);
-int tegra_powergate_remove_clamping(unsigned int id);
-
-int tegra_powergate_sequence_power_up(unsigned int id, struct clk *clk,
- struct reset_control *rst);
-
-int tegra_io_pad_power_enable(enum tegra_io_pad id);
-int tegra_io_pad_power_disable(enum tegra_io_pad id);
-
-void tegra_pmc_set_suspend_mode(enum tegra_suspend_mode mode);
-void tegra_pmc_enter_suspend_mode(enum tegra_suspend_mode mode);
-
-bool tegra_pmc_core_domain_state_synced(void);
-
#else
static inline struct tegra_pmc *devm_tegra_pmc_get(struct device *dev)
{
@@ -223,42 +203,22 @@ tegra_pmc_io_pad_power_disable(struct tegra_pmc *pmc, enum tegra_io_pad id)
{
return -ENOSYS;
}
+#endif /* CONFIG_SOC_TEGRA_PMC */
-static inline int tegra_powergate_power_on(unsigned int id)
-{
- return -ENOSYS;
-}
-
-static inline int tegra_powergate_power_off(unsigned int id)
-{
- return -ENOSYS;
-}
-
-static inline int tegra_powergate_remove_clamping(unsigned int id)
-{
- return -ENOSYS;
-}
-
-static inline int tegra_powergate_sequence_power_up(unsigned int id,
- struct clk *clk,
- struct reset_control *rst)
-{
- return -ENOSYS;
-}
-
-static inline int tegra_io_pad_power_enable(enum tegra_io_pad id)
-{
- return -ENOSYS;
-}
-
-static inline int tegra_io_pad_power_disable(enum tegra_io_pad id)
-{
- return -ENOSYS;
-}
+/* 32-bit ARM platforms only */
+#if defined(CONFIG_ARM)
+bool tegra_pmc_cpu_is_powered(unsigned int cpuid);
+int tegra_pmc_cpu_power_on(unsigned int cpuid);
+int tegra_pmc_cpu_remove_clamping(unsigned int cpuid);
-static inline int tegra_io_pad_get_voltage(enum tegra_io_pad id)
+#if defined(CONFIG_SOC_TEGRA_PMC) && defined(CONFIG_PM_SLEEP)
+enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void);
+void tegra_pmc_set_suspend_mode(enum tegra_suspend_mode mode);
+void tegra_pmc_enter_suspend_mode(enum tegra_suspend_mode mode);
+#else
+static inline enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void)
{
- return -ENOSYS;
+ return TEGRA_SUSPEND_NONE;
}
static inline void tegra_pmc_set_suspend_mode(enum tegra_suspend_mode mode)
@@ -268,21 +228,17 @@ static inline void tegra_pmc_set_suspend_mode(enum tegra_suspend_mode mode)
static inline void tegra_pmc_enter_suspend_mode(enum tegra_suspend_mode mode)
{
}
+#endif
+#endif
+#if defined(CONFIG_ARM) && defined(CONFIG_SOC_TEGRA_PMC)
+bool tegra_pmc_core_domain_state_synced(void);
+#else
+/* needed for COMPILE_TEST */
static inline bool tegra_pmc_core_domain_state_synced(void)
{
return false;
}
-
-#endif /* CONFIG_SOC_TEGRA_PMC */
-
-#if defined(CONFIG_SOC_TEGRA_PMC) && defined(CONFIG_PM_SLEEP)
-enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void);
-#else
-static inline enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void)
-{
- return TEGRA_SUSPEND_NONE;
-}
#endif
#endif /* __SOC_TEGRA_PMC_H__ */
generated by cgit v1.2.3 (git 2.0.4) at 2026-07-29 20:56:52 +0000