index
:
linux-toradex.git
colibri
colibri_vf
tegra
tegra-next
toradex_4.1-2.0.x-imx
toradex_4.1-2.0.x-imx-next
toradex_4.14-2.0.x-imx
toradex_4.14-2.0.x-imx-next
toradex_4.14-2.0.x-imx-rebased
toradex_4.14-2.3.x-imx
toradex_4.19.y
toradex_4.19.y-rt
toradex_4.20.y
toradex_4.9-1.0.x-imx
toradex_4.9-1.0.x-imx-next
toradex_4.9-1.0.x-imx-rebased
toradex_4.9-2.3.x-imx
toradex_4.9-2.3.x-imx-next
toradex_4.9-2.3.x-imx-rebased
toradex_5.0.y
toradex_5.15-2.0.x-imx
toradex_5.15-2.1.x-imx
toradex_5.15-2.2.x-imx
toradex_5.2.y
toradex_5.3.y
toradex_5.4-2.1.x-imx
toradex_5.4-2.3.x-imx
toradex_5.4.y
toradex_6.6-2.0.x-imx
toradex_6.6-2.1.x-imx
toradex_imx6
toradex_imx_3.10.17_1.0.0_ga
toradex_imx_3.10.17_1.0.0_ga-next
toradex_imx_3.14.28_1.0.0_ga
toradex_imx_3.14.52_1.1.0_ga
toradex_imx_3.14.52_1.1.0_ga-next
toradex_imx_4.1.15_1.0.0_ga
toradex_imx_4.1.15_1.0.0_ga-next
toradex_imx_4.14.78_1.0.0_ga-bring_up
toradex_imx_4.9.123_imx8mm_ga-bring_up
toradex_imx_4.9.51_imx8_beta1-bring_up
toradex_imx_4.9.51_imx8_beta1-bring_up_ov5640
toradex_imx_4.9.51_imx8_beta2-bring_up
toradex_ti-linux-5.10.y_bringup
toradex_ti-linux-6.1.y
toradex_ti-linux-6.6.y
toradex_tk1_l4t_r21.5
toradex_tk1_l4t_r21.6
toradex_tk1_l4t_r21.7
toradex_tk1_l4t_r21.7-next
toradex_vf_3.18
toradex_vf_3.18-next
toradex_vf_4.0
toradex_vf_4.0-next
toradex_vf_4.1
toradex_vf_4.1-next
toradex_vf_4.4
toradex_vf_4.4-next
Linux kernel for Apalis and Colibri modules
Toradex
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path:
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mm
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cache-v7.S
Age
Commit message (
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)
Author
2015-09-17
MLK-11284 ARM: ERRATA: Add ARM/MP: 814220 SW workaround
Jason Liu
2013-12-29
ARM: 7919/1: mm: refactor v7 cache cleaning ops to use way/index sequence
Lorenzo Pieralisi
2013-08-12
ARM: mm: use inner-shareable barriers for TLB and user cache operations
Will Deacon
2013-06-17
ARM: 7752/1: errata: LoUIS bit field in CLIDR register is incorrect
Jon Medhurst
2013-02-11
arm: Add v7_invalidate_l1 to cache-v7.S
Dinh Nguyen
2012-12-20
ARM: 7606/1: cache: flush to LoUU instead of LoUIS on uniprocessor CPUs
Will Deacon
2012-10-11
Merge branch 'fixes' into for-linus
Russell King
2012-09-28
ARM: 7541/1: Add ARM ERRATA 775420 workaround
Simon Horman
2012-09-25
ARM: mm: rename jump labels in v7_flush_dcache_all function
Lorenzo Pieralisi
2012-09-25
ARM: mm: implement LoUIS API for cache maintenance ops
Lorenzo Pieralisi
2012-05-02
ARM: 7408/1: cacheflush: return error to userspace when flushing syscall fails
Will Deacon
2012-02-15
ARM: 7325/1: fix v7 boot with lockdep enabled
Rabin Vincent
2012-02-09
ARM: 7321/1: cache-v7: Disable preemption when reading CCSIDR
Stephen Boyd
2011-09-17
ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeed
Will Deacon
2011-07-07
ARM: mm: cache-v7: Use the new processor struct macros
Dave Martin
2011-05-26
ARM: 6941/1: cache: ensure MVA is cacheline aligned in flush_kern_dcache_area
Will Deacon
2011-03-31
Fix common misspellings
Lucas De Marchi
2010-12-12
ARM: 6528/1: Use CTR for the I-cache line size on ARMv7
Catalin Marinas
2010-10-04
ARM: 6405/1: Handle __flush_icache_all for CONFIG_SMP_ON_UP
Tony Lindgren
2010-10-04
ARM: Allow SMP kernels to boot on UP systems
Russell King
2010-05-20
ARM: 6139/1: ARMv7: Use the Inner Shareable I-cache on MP
Santosh Shilimkar
2010-05-08
ARM: 6112/1: Use the Inner Shareable I-cache and BTB ops on ARMv7 SMP
Catalin Marinas
2010-02-15
ARM: dma-mapping: fix for speculative prefetching
Russell King
2010-02-15
ARM: dma-mapping: remove dmac_clean_range and dmac_inv_range
Russell King
2010-02-15
ARM: dma-mapping: provide per-cpu type map/unmap functions
Russell King
2009-12-14
ARM: add size argument to __cpuc_flush_dcache_page
Russell King
2009-10-07
ARM: 5746/1: Handle possible translation errors in ARMv6/v7 coherent_user_range
Catalin Marinas
2009-07-24
Thumb-2: Implement the unified arch/arm/mm support
Catalin Marinas
2008-11-06
ARMv7: Add extra barriers for flush_cache_all compressed/head.S
Catalin Marinas
2008-09-01
[ARM] 5227/1: Add the ENDPROC declarations to the .S files
Catalin Marinas
2007-05-08
[ARM] armv7: add support for ARMv7 cores.
Catalin Marinas