| Age | Commit message (Expand) | Author |
|---|---|---|
| 2014-11-24 | MIPS: Add hook to get C0 performance counter interrupt | Andrew Bresticker |
| 2013-02-19 | MIPS: ath79: add IRQ handling code for the QCA955X SoCs | Gabor Juhos |
| 2013-02-17 | ath79: remove ATH79_MISC_IRQ_* defines | Gabor Juhos |
| 2013-02-17 | ath79: add ATH79_CPU_IRQ() macro | Gabor Juhos |
| 2013-02-17 | MIPS: ath79: simplify MISC IRQ handling | Gabor Juhos |
| 2012-05-15 | MIPS: ath79: add IRQ handling code for AR934X | Gabor Juhos |
| 2012-05-15 | MIPS: ath79: rework IP2/IP3 interrupt handling | Gabor Juhos |
| 2011-12-07 | MIPS: ath79: Add AR933X specific IRQ initialization | Gabor Juhos |
| 2011-12-07 | MIPS: ath79: Handle more MISC IRQs | Gabor Juhos |
| 2011-03-29 | MIPS: Convert the irq functions to the new names | Thomas Gleixner |
| 2011-03-25 | MIPS: ath79: Convert to new irq_chip functions | Thomas Gleixner |
| 2011-03-25 | MIPS: Remove useless initialization. | Ralf Baechle |
| 2011-01-18 | MIPS: Add initial support for the Atheros AR71XX/AR724X/AR931X SoCs | Gabor Juhos |
