linux-toradex.git - Linux kernel for Apalis and Colibri modules

Age	Commit message (Expand)	Author
2012-10-11	MIPS: Add detection of DSP ASE Revision 2.	Steven J. Hill
2012-10-11	MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt)	Al Cooper
2012-09-13	MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'.	Steven J. Hill
2012-09-13	MIPS: Add base architecture support for RI and XI.	Steven J. Hill
2010-08-05	MIPS: Update comment for cpu_has_clo_clz	Ralf Baechle
2010-02-27	MIPS: Implement Read Inhibit/eXecute Inhibit	David Daney
2010-02-02	MIPS: 64-bit: Detect virtual memory size	Guenter Roeck
2009-09-17	MIPS: Allow kernel use of LL/SC to be separate from the presence of LL/SC.	David Daney
2009-06-17	MIPS: Allow CPU specific overriding of CP0 hwrena impl bits.	David Daney
2009-06-17	MIPS: Allow R2 CPUs to turn off generation of 'ehb' instructions.	David Daney
2009-05-14	MIPS: Enable CLO / CLZ instructions via separate CPU property	Ralf Baechle
2009-01-11	MIPS: Hook Cavium OCTEON cache init into cache.c	David Daney
2008-10-30	MIPS: New feature test macro cpu_has_mips_r	Ralf Baechle
2008-10-11	MIPS: Move headfiles to new location below arch/mips/include	Ralf Baechle