linux-toradex.git - Linux kernel for Apalis and Colibri modules

Age	Commit message (Expand)	Author
2025-03-13	riscv: cacheinfo: Use of_property_present() for non-boolean properties	Rob Herring
2025-03-13	riscv: Prevent a bad reference count on CPU nodes	Miquel Sabaté Solà
2025-03-13	riscv: cacheinfo: initialize cacheinfo's level and type from ACPI PPTT	Yunhui Cui
2025-03-13	riscv: cacheinfo: remove the useless input parameter (node) of ci_leaf_init()	Yunhui Cui
2023-04-28	Merge tag 'riscv-for-linus-6.4-mw1' of git://git.kernel.org/pub/scm/linux/ker...	Linus Torvalds
2023-04-13	riscv: cacheinfo: Adjust includes to remove of_device.h	Rob Herring
2023-04-11	Revert "riscv: Set more data to cacheinfo"	Song Shuai
2023-01-18	arch_topology: Build cacheinfo from primary CPU	Pierre Gondois
2023-01-17	cacheinfo: Use RISC-V's init_cache_level() as generic OF implementation	Pierre Gondois
2021-09-01	drivers: base: cacheinfo: Get rid of DEFINE_SMP_CALL_CACHE_FUNCTION()	Thomas Gleixner
2021-01-12	riscv: cacheinfo: Fix using smp_processor_id() in preemptible	Kefeng Wang
2020-09-15	riscv: Add cache information in AUX vector	Zong Li
2020-09-15	riscv: Set more data to cacheinfo	Zong Li
2020-05-20	riscv: cacheinfo: Implement cache_get_priv_group with a generic ops structure	Yash Shah
2019-06-05	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	Thomas Gleixner
2018-12-21	RISC-V: Fix of_node_* refcount	Atish Patra
2018-10-22	RISC-V: Don't set cacheinfo.{physical_line_partition,attributes}	Palmer Dabbelt
2018-05-17	drivers: base: cacheinfo: setup DT cache properties early	Jeremy Linton
2017-09-26	RISC-V: Init and Halt Code	Palmer Dabbelt