linux-toradex.git - Linux kernel for Apalis and Colibri modules

Age	Commit message (Expand)	Author
2022-12-09	RISC-V: Ensure Zicbom has a valid block size	Andrew Jones
2022-12-09	RISC-V: Introduce riscv_isa_extension_check	Andrew Jones
2022-12-09	RISC-V: Improve use of isa2hwcap[]	Andrew Jones
2022-10-14	Merge tag 'riscv-for-linus-6.1-mw2' of git://git.kernel.org/pub/scm/linux/ker...	Linus Torvalds
2022-10-13	Merge patch series "Some style cleanups for recent extension additions"	Palmer Dabbelt
2022-10-13	riscv: use BIT() marco for cpufeature probing	Heiko Stuebner
2022-10-13	riscv: drop some idefs from CMO initialization	Heiko Stuebner
2022-10-13	riscv: cleanup svpbmt cpufeature probing	Heiko Stuebner
2022-10-02	RISC-V: Probe Svinval extension form ISA string	Mayuresh Chitale
2022-08-16	riscv: Ensure isa-ext static keys are writable	Andrew Jones
2022-08-11	RISC-V: Add Sstc extension support	Palmer Dabbelt
2022-08-11	RISC-V: Enable sstc extension parsing from DT	Atish Patra
2022-08-11	arch/riscv: add Zihintpause support	Dao Lu
2022-08-10	riscv: implement Zicbom-based CMO instructions + the t-head variant	Palmer Dabbelt
2022-07-28	riscv: Add support for non-coherent devices using zicbom extension	Heiko Stuebner
2022-07-19	RISC-V: Support for 64bit hartid on RV64 platforms	Palmer Dabbelt
2022-07-19	riscv: cpu: Add 64bit hartid support on RV64	Sunil V L
2022-06-16	RISC-V: Some Svpbmt fixes and cleanups	Palmer Dabbelt
2022-06-16	riscv: remove usage of function-pointers from cpufeatures and t-head errata	Heiko Stuebner
2022-06-16	riscv: drop cpufeature_apply_feature tracking variable	Heiko Stuebner
2022-06-16	riscv: switch has_fpu() to the unified static key mechanism	Jisheng Zhang
2022-06-16	riscv: introduce unified static key mechanism for ISA extensions	Jisheng Zhang
2022-06-04	Merge tag 'bitmap-for-5.19-rc1' of https://github.com/norov/linux	Linus Torvalds
2022-06-03	risc-v: replace bitmap_weight with bitmap_empty in riscv_fill_hwcap()	Yury Norov
2022-05-11	riscv: add memory-type errata for T-Head	Heiko Stuebner
2022-05-11	riscv: add RISC-V Svpbmt extension support	Heiko Stuebner
2022-03-21	RISC-V: Add sscofpmf extension support	Atish Patra
2022-03-17	RISC-V: Do no continue isa string parsing without correct XLEN	Atish Patra
2022-03-17	RISC-V: Implement multi-letter ISA extension probing framework	Atish Patra
2022-03-17	RISC-V: Extract multi-letter extension names from "riscv, isa"	Tsukasa OI
2022-03-17	RISC-V: Minimal parser for "riscv, isa" strings	Tsukasa OI
2022-03-17	RISC-V: Correctly print supported extensions	Tsukasa OI
2021-05-29	riscv: Add __init section marker to some functions again	Jisheng Zhang
2021-05-25	riscv: Turn has_fpu into a static key if FPU=y	Jisheng Zhang
2020-05-04	RISC-V: Add bitmap reprensenting ISA features common across CPUs	Anup Patel
2019-10-28	riscv: add missing header file includes	Paul Walmsley
2019-06-19	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234	Thomas Gleixner
2019-03-04	RISC-V: Assign hwcap as per comman capabilities.	Atish Patra
2019-02-11	riscv: use for_each_of_cpu_node iterator	Johan Hovold
2019-02-11	riscv: add missing newlines to printk messages	Johan Hovold
2018-12-21	RISC-V: Fix of_node_* refcount	Atish Patra
2018-10-31	RISC-V: properly determine hardware caps	Andreas Schwab
2018-10-22	riscv: Add support to no-FPU systems	Palmer Dabbelt
2018-10-22	RISC-V: Mask out the F extension on systems without D	Palmer Dabbelt
2018-10-22	Auto-detect whether a FPU exists	Alan Kao
2017-09-26	RISC-V: User-facing API	Palmer Dabbelt